Lead Electrical Engineer

Lead Electrical Engineer

You’ll be a key hire to their electrical engineering team, owning the wearable electrical architecture from schematic to production. The device combines cameras, spatial audio microphones, EEG sensors, Wi-Fi/BLE, and power management on a flex PCB inside a textile beanie.

What You’ll Do

• Own the electrical architecture across the platform — compute partitioning, sensor integration, power, RF, and SI/PI.
• Lead schematic and PCB design for flex and rigid-flex multi-island layouts, and own SI/PI sign-off across every revision.
• Architect the power tree — battery management, multi-rail regulation, USB-C charging, and dynamic power budgeting.
• Own RF and wireless electrical design — antenna diversity, body-proximity tuning, and Wi-Fi/BLE coexistence.
• Define and validate every communication bus on the platform — parallel and serial sensor interfaces, audio buses, inter-MCU links.
• Drive part selection, benchmarking, and BOM ownership across MCUs, PMICs, RF SoCs, and the full electrical BOM, with second-source strategy.
• Lead bring-up at the electrical layer — own SI, PI, power, and bus-level debug, and unblock firmware and subsystem leads on the way.
• Drive the design through DFM and qualification gates with our CMs, and ship the product by end of year.
• Build and lead the EE team as we scale from early test batches to production volumes.

Responsibilities:

• 10+ years designing complex consumer hardware, with at least one shipped product (wearable, audio, mobile, or comparable).
• Deep mixed-signal expertise across MCU systems, sensor AFEs, audio DSPs, image sensor interfaces, RF/wireless, and battery/charging.
• Strong SI/PI discipline with hands-on sign-off on flex and rigid-flex multi-island designs.
• Direct experience architecting and validating multi-MCU communication buses — parallel and serial interfaces, inter-processor links.
• Direct experience driving part selection, BOM ownership, and second-source strategy on a shipped product.
• Track record of leading hardware bring-up and partnering closely with firmware on debug.
• Comfortable owning overseas CM relationships and driving DFM, DFT, and DFA from prototype through volume.

Preferred Skills:

• EEG, ECoG, or other biopotential systems — especially high-channel-count or dense sensor arrays.
• Integrating low-power AI accelerator silicon into mixed-signal systems.
• Custom ASIC bring-up, silicon co-design, or in-array readout architectures.
• RF design for body-worn antennas and multi-radio coexistence.
• Founding engineer or lead-level experience at an early-stage hardware company.

Diane Chen

x130

Type: Fulltime

Location: Palo Alto, CA (Hybrid Schedule)

Salary Range: $300k - $400k/y (DOE)