AMS Verification Engineer

Minimum 5 years of ASIC verification experience
We are seeking a talented AMS Verification Engineer. If you have experience with high-speed mixed-signal IP verification, including protocols like PCIe, USB, MIPI, and DDR, and are passionate about cutting-edge applications in 5G, AI/ML, IoT, and automotive, we want to hear from you!

Key Responsibilities:
Develop pre- and post-silicon test plans aligned with design specs and standards
Architect and develop verification testbenches using SystemVerilog/UVM, formal methods, and analog/mixed-signal simulations
Write assertions in SVA, create test cases, coverage models, and ensure coverage closure
Collaborate with digital and analog design teams for PHY verification, integration, and post-silicon validation
Experience with VIP development for Serdes controller + PHY is a plus
Preferred Qualifications:
Expertise in low power verification, formal verification, and gate-level simulation
Knowledge of industry-standard protocols (PCIe, USB, MIPI, LPDDR, etc.)
Proficiency in scripting languages like Python or Perl
Experience with mixed-signal IP verification (USB, PCIe, CXL, DDR, PLL, sensors, etc.)
Top Skills:
SystemVerilog/UVM methodology
ASIC simulation/formal tools (VCS, Xcelium/NCsim, Questa, JasperGold, etc.)
Knowledge of protocols like PCIe, USB, MIPI, LPDDR
Qualifications:
Master s/Bachelor s degree in Electrical or Computer Engineering or related field