Signal Integrity Engineer

Signal Integrity

They will take contractors onsite preferred or remote for 6 months. $105hr payrate MAX

They will take fulltime candidate at $250k + Ben

SERDES is a very hard must for both the SI and packaging positions.

Signal Integrity Engineer- Power Integrity experience is a plus.

Experience with HFSS, ADS, PowerSI.

Experience with SERDES interfaces such as PCIe, PAM4, USB.

Experience with Characterization and Bring Up.

Will be leading the simulations and debugging.

Signal Integrity (SI):

Model and simulate high-speed interfaces (e.g., 224G-PAM4 SerDes).

Perform channel simulations (TX-to-RX) across packages and PCBs.

Work with IBIS-AMI, S-parameter models, and tools like Ansys HFSS, Keysight ADS, or Cadence Sigrity.

Optimize interconnects to meet eye diagram, BER, and insertion/return loss targets.

Validate compliance with standards like IEEE 802.3df/802.3dj and UAL.

Skills & Tools:

Simulation Tools:

SI: ADS, HFSS, ADK, HSPICE

PI: PowerSI, PowerDC

Analysis:

Time-domain and frequency-domain signal analysis

Crosstalk, jitter, eye closure, PDN impedance