Sr Analog Design Engineer

Must Have Prior Experience
Analog circuit design experience in DACs, ADCs, current drivers, linear regulators, and other various supporting circuitry in CMOS processes. (high voltage experience is a plus).
Good understanding of IC device physics, spice models, ESD, latch-up, and manufacturing technology are also required.
Proficient in the use of Cadence's IC design environment (Virtuoso Schematic/Layout), analog circuit simulation (Spectre/ADE), and digital RTL design (SystemVerilog).
Nice To Have
Knowledge of mixed mode simulation (Cadence AMS Designer) is a plus.
Previous experience with testing and characterization of ASICs is very desirable.
Proficiency in the use of Python to generate test code for silicon verification & characterization.
Knowledge of lab equipment including digital oscilloscopes, signal generators and Semiconductor Automatic Testers (Advantest/ATE).