Design Verification Engineer

Job Title: Design Verification Engineer Location: San Jose, CA Experience: 8+ Years Type: Contract Description: This requirement is for a Senior Design Verification (DV) Engineer focused on verifying complex semiconductor IPs and SoCs before silicon fabrication. The client is looking for someone who can independently build verification environments, create test plans, and identify design bugs early in the development cycle. Key Skills Required 8+ years of Design Verification experience in s

Payrate: $82.00- $85.00/hr. Summary Design Verification engineer for wearables silicon accelerator IPs testbench development, coverage-driven verification, RTL debug, and power/performance measurement. ResponsibilitiesDevelop and execute verification plans for RTL blocks/IPs across the subsystem.Build and maintain System Verilog/UVM test benches; write directed and constrained-random tests.Drive functional coverage and assertion (SVA) closure; run and triage regressions.Perform power/performan

We have opening for Design Verification Engineer, Principal Location - Santa Clara, CA Full time permanent position Sponsorship available Must-haves BS Computer Engineering, Electrical Engineering, or Computer Science 10+ years of verification and firmware and software development experience (or MS/PhD 5+ years experience). Proven track records of leading Design Verification implementation activity Tape-out of complex SOC under tight schedule. In depth understanding and experience with System V

Job Title: Design Verification Engineer Location: Sunnyvale, CA (Onsite 3 days/week) Duration: Contract - 6 months, extension TBD Pay Range: $60/hr - $65.32/hr (W2). Job ID: 407927 About BCforward BCforward is a leading global IT consulting and workforce solutions firm providing services and support to Fortune 500 and government clients. Founded in 1998, BCforward has grown with our customers needs into a full-service business solutions provider. With delivery centers and offices across No