SoC UPF Methodology Engineer

Are you passionate about crafting solutions to intricate challenges? Join the Low Power group\\nat Silicon Technologies and contribute to the development of cutting-edge technology and\\ncapabilities for low-power chip design. Your work will fuel Apple's next-generation chips!\\nYou'll play a crucial role in exploring AI/ML to design the workflow for the next generation of\\nUPF. Additionally, you'll refine our existing UPF framework and ensure its seamless integration\\nand rigorous verification across our mobile products.\\n\\nYou will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. \\n\\nWe have an extraordinary opportunity for Power UPF Engineers, who will drive transistor level power ERC sign-off and power intent-UPF implementation & verification on mobile SOCs.

In this role, your main objective will be to enhance our Unified Power Format (UPF)\nmethodologies, refining power intent specification, execution, and validation to support state-\nof-the-art mobile SOCs. Key responsibilities encompass:\n Enhancing power intent coverage via advanced static and dynamic verification techniques.\n Developing tailored UPF solutions to align with unique project requirements.\n Overseeing UPF deployment and sign-o? for frontend (FE) and place-and-route (P&R) stages.\n Conducting thorough power intent assessments on custom circuitry.\n Partnering with design and verification teams to troubleshoot and fix UPF-related workflow\nchallenges.\n Integrating AI/ML technologies to optimize UPF processes and methodologies.

A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience

Expertise in UPF implementation and verification.\nProficiency in scripting with languages like Python and Tcl.\nUnderstanding of CMOS power design principles.\nExperience applying AI/ML to coding and workflow optimization.\nKnowledge of multi-voltage static verification tools (e.g., VSILP/VCLP, CLP).\nFamiliarity with the complete RTL-to-GDSII design flow.\nStrong communication abilities for e?ective collaboration across multidisciplinary teams.