Member of Technical Staff, AMD GPU Performance Engineering

Hybrid in San Francisco, CA, US • Posted 22 hours ago • Updated 22 hours ago
Full Time
Able to Sponsor
Hybrid
Depends on Experience
Fitment

Dice Job Match Score™

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Job Details

Skills

  • GPU ENGINEER
  • GPU PERFORMANCE ENGINEER
  • KERNEL ENGINEER
  • ML PERFORMANCE ENGINEER
  • HPC ENGINEER
  • AI SYSTEMS ENGINEER
  • COMPILER ENGINEER
  • ROCM
  • HIP
  • AMD
  • TRITON
  • GPU
  • KERNEL
  • GEMM
  • ATTENTION
  • INFERENCE
  • LLM
  • VLLM
  • SGLANG
  • BENCHMARKING

Summary

 

Mindsource is seeking a AMD GPU Performance Engineer  for one of our Direct Client . If interested, please drop your resume to akhil@mindsource.com  

About the Role
We're looking for an AMD GPU performance engineer to make vLLM a first-class inference engine across the AMD accelerator ecosystem. You'll build and optimize AMD GPU backends, kernels, runtime paths, and benchmarking infrastructure using ROCm, HIP, Triton, CK, AITER, and related tooling so vLLM can deliver frontier inference performance on AMD GPUs.
You'll work at the boundary of inference systems, kernels, compilers, and hardware architecture, improving performance-critical paths such as attention, GEMM, sampling, KV cache, and communication-heavy operations. Your work will help make AMD GPU support in vLLM usable, fast, benchmarked, and maintainable.
 
Skills and Qualifications
Minimum qualifications:

  • Bachelor's degree or equivalent experience in computer science, engineering, systems, machine learning, or similar.
  • Hands-on experience optimizing AMD GPU workloads using ROCm, HIP, Triton, CK, AITER, or similar AMD ecosystem tools.
  • Deep understanding of AMD GPU execution, memory behavior, toolchains, kernel performance, and backend-specific performance constraints.
  • Experience optimizing ML kernels or inference paths such as attention, GEMM, sampling, KV cache, fused kernels, or communication-heavy runtime paths.
  • Strong performance profiling and benchmarking skills, with the ability to use measurements, hardware counters, correctness tests, and reproducible benchmarks to guide optimization work.
Preferred qualifications:
  • Experience with vLLM, SGLang, TensorRT-LLM, ROCm-based serving, or other LLM inference systems.
  • Familiarity with batching, KV cache, decoding, serving tradeoffs, and backend performance constraints in production inference systems.
  • Experience with compiler and kernel technologies such as Triton, MLIR, LLVM, CK, AITER, HIP, or other kernel DSLs and backend libraries.
  • Knowledge of quantization methods such as INT8, FP8, mixed precision, or AMD hardware-specific numeric formats, including accuracy and performance tradeoffs.
Bonus points if you have:
  • Contributed to vLLM, ROCm, HIP, Triton, CK, AITER, PyTorch, compiler projects, or other open-source ML infrastructure.
  • Built AMD GPU benchmarking infrastructure or automated performance regression detection for accelerator workloads.
  • Worked directly with AMD, accelerator platform teams, or early-access programs to ship backend, compiler, or inference performance improvements.


 

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: minds
  • Position Id: 26-00356
  • Posted 22 hours ago
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