CPU Implementation Engineer

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APPLE INC has the following available in Austin, Texas. Perform physical design implementation of CPU designs from RTL to GDS to create a design database that meets power, performance, and area targets and is ready for manufacturing using industry standard tools/flows. Conduct all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Work with Micro-architects to define memory subsystem, perform feasibility, make area, frequency, performance, power trade-offs and design and balance the pipeline stages. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability, and power. Conduct verification and signoff including static timing analysis, logic equivalency, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyze results and making recommendations to improve current and future CPU microarchitectures closely collaborating with logic, circuit, architecture, and design automation teams. 40 hours/week.

Bachelor's degree or foreign equivalent in Computer Engineering or related field and 3 years of experience in the job offered or related occupation. \n\nExperience and/or education must include: \n\nPerforming synthesis, place and route with leading EDA tools.\nUtilizing logic design principles along with timing and power implications to achieve best Power-Performance-Area.\nUnderstanding of low power microarchitecture and implementation techniques to implement CPU designs.\nDesigning in deep sub-micron technologies and device physics.\nUtilizing TCL, Perl and Python for scripting to gather and analyze design data.\nRunning Static Timing Analysis and analyzing timing failures to implement fixes.\nPerforming Logical Equivalency check to ensure design correctness.\nPerforming Electrical Rule Checking and Physical Design Verification for silicon tapeout quality.

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