EDA/HPC Architect (100% Remote)

Key Responsibilities

• Infrastructure Design: Architect high-performance, scalable clusters tailored for RTL simulation, logic synthesis, and physical design workloads.
• Tool Optimization: Experience working with CAD teams to tune infrastructure for peak performance of industry-standard tools like Synopsys IC Compiler II/Fusion Compiler and Cadence Virtuoso/Innovus.
• Storage & Data Management: Familiar with low-latency, high-throughput storage requirements for Flash/NVMe systems capable of handling the high-I/O metadata requirements and multi-terabyte datasets.

Required Qualifications

• Experience: 7 10 years of professional experience in HPC / EDA systems architecture, with a focus on the semiconductor or electronics industry.
• Software Proficiency: Knowledge of the infrastructure interdependencies of Synopsys and/or Cadence design environments.
• Technical Stack:
• Experience with Linux administration and kernel tuning for EDA.
• Familiar with scripting languages (Python, Bash, or Perl) for automation.
• Familiar with high-performance networking (InfiniBand/High-speed Ethernet).
• Education: Bachelor s degree in Electrical Engineering, Computer Science, or a related technical field.