Design Verification Engineer

Role: Principal Engineer, Design Verification (NPU) Location: Mountain View, CA (Onsite) Job Type: Contract Project description The Principal Design Verification Engineer, within the NPU Hardware & Software organization, is intended for an individual with a broad background in design verification and complex digital system validation, with significant experience in AI accelerator verification and automotive safety standards. This role is responsible for driving the verification excelle

Job Title: "Design Verification Engineer (GPU)" Location: San Jose, CA (Onsite, 5 days a week) Duration: Long Term Description As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of our GPU architecture. Creativity is a necessity to overcome the challenges inherent to verifying the proper operation of our low-power GPU. Versatility and broad knowledge of state-of-the-art verification techniques including the most up-to-date I UVM version will place you among

Design Verification (DV) Engineer Key Responsibilities Develop and maintain UVM-based SystemVerilog testbenchesCreate reusable verification components and environmentsDevelop and execute verification plans for subsystem and block levelDebug RTL issues and collaborate closely with designContribute to end-to-end validation flowsDrive coverage closureRequired Qualifications Strong hands-on expertise in UVM and SystemVerilogExperience with ARM-based protocols including:APBAXI (no CHI/coherency requi

Design Verification (DV) Engineer Key Responsibilities Develop and maintain UVM-based SystemVerilog testbenchesCreate reusable verification components and environmentsDevelop and execute verification plans for subsystem and block levelDebug RTL issues and collaborate closely with designContribute to end-to-end validation flowsDrive coverage closureRequired Qualifications Strong hands-on expertise in UVM and SystemVerilogExperience with ARM-based protocols including:APBAXI (no CHI/coherency requi