Overview
On Site
USD 96,000.00 - 151,000.00 per year
Full Time
Skills
SATCOM
Signal Processing
Algorithms
Network Protocols
Collaboration
Network
SystemVerilog
Writing
Management
Test Cases
RTL
Reporting
Design Review
Electrical Engineering
Computer Engineering
Communication
Virtual Team
Attention To Detail
Data Analysis
EDA
Xilinx ISE
Altera Quartus
Siemens
Mentor Graphics
Synopsys
Integrated Circuit
ASIC
Verilog
VHDL
UVM
Scalability
Mergers and Acquisitions
Tcl
Perl
Python
Scripting Language
Interfaces
SERDES
DDR SDRAM
Debugging
Embedded Systems
FPGA
Documentation
Place And Route
Testing
Computer Hardware
Linux
Security Clearance
Finance
Genetics
SAP BASIS
Job Details
About us
One team. Global challenges. Infinite opportunities. At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We're looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.
What you'll do
Viasat is a rapidly growing technology company that crafts, deploys and operates innovative SATCOM products and services that span the globe! At Viasat Government you'll work with highly motivated engineers in an exciting and dynamic environment. You will be able to use your engineering experience to support the next generation of advanced communications products and systems.
In this role you will help develop high speed signal processing algorithms and/or network protocols in FPGAs. The individual will be responsible for RTL design verification at both the unit and system level, implementing UVM environments and test cases. The individual will collaborate with other engineers from different fields and must be capable of working in both a small team setting and a larger team setting. Experience in the development of high-performance FPGA designs, network encryptors and cryptographic devices is a plus.
The day-to-day
Testbench development using SystemVerilog/UVM
Creating drivers, monitors, scoreboards, sequences, and model predictors for a variety of interfaces
Writing and debugging constrained random and directed test cases
Debugging failing tests, understanding both the UVM testbench and VHDL/Verilog source code, working closely with the RTL developers
Collecting and reporting code and functional coverage
Maintaining regular simulation regressions
Conduct code and design reviews and participate in multi-functional reviews
Maintain and control UVM code revision history
Responsible for owning and driving technical issues to resolution
What you'll need
Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field
8+ years FPGA/ASIC design with UVM verification experience
Foundational knowledge of digital logic and timing considerations
Strong written and verbal communication skills, ability to work with a geographically distributed team
Attention to detail, ability to follow process and coding guidelines, participate in code reviews and accept feedback
Experience with Programmable Logic EDA tools, such as AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify, SoftCore Micro embedments in MicroChip, etc.
Proven track record to design and implement FPGA/ASIC modules using Verilog and/or VHDL with UVM simulation and testbench development
Familiarity with designing and coding for re-use, maintainability and scalability
Desire to a member of a team, collaborating on large system designs
Work independently, take initiative, and take ownership of tasks and results
ship required
Must be able to obtain and maintain a United States Secret Clearance
This is a 100% onsite role and the incumbent will work out of one of these locations: Carlsbad, CA, Linthicum Heights, MD, Tampa FL, or Marlborough, MA
Ability to travel up to 10%
What will help you on the job
MSEE degree preferred
Familiarity with TCL, Perl, Python or another scripting language
Experience with high-speed interfaces like SERDES, DDR2/3/4, LVDS
Proven experience in debugging, diagnosing, and solving embedded designs issues
Experience with the rest of the FPGA design process, from the requirements phase to documentation, design, implementation of source code, place & route, testing in hardware, and integration
Experience and familiarity with Linux-based development environments
Active United States Secret Security Clearance
Salary range
$96,000.00 - $151,000.00 / annually.For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $115,500.00- $173,500.00/ annually
At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge, skills, and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits, dependent on the position offered. Learn more about Viasat's comprehensive benefit offerings that are focused on your holistic health and wellness at
EEO Statement
Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.
One team. Global challenges. Infinite opportunities. At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We're looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.
What you'll do
Viasat is a rapidly growing technology company that crafts, deploys and operates innovative SATCOM products and services that span the globe! At Viasat Government you'll work with highly motivated engineers in an exciting and dynamic environment. You will be able to use your engineering experience to support the next generation of advanced communications products and systems.
In this role you will help develop high speed signal processing algorithms and/or network protocols in FPGAs. The individual will be responsible for RTL design verification at both the unit and system level, implementing UVM environments and test cases. The individual will collaborate with other engineers from different fields and must be capable of working in both a small team setting and a larger team setting. Experience in the development of high-performance FPGA designs, network encryptors and cryptographic devices is a plus.
The day-to-day
Testbench development using SystemVerilog/UVM
Creating drivers, monitors, scoreboards, sequences, and model predictors for a variety of interfaces
Writing and debugging constrained random and directed test cases
Debugging failing tests, understanding both the UVM testbench and VHDL/Verilog source code, working closely with the RTL developers
Collecting and reporting code and functional coverage
Maintaining regular simulation regressions
Conduct code and design reviews and participate in multi-functional reviews
Maintain and control UVM code revision history
Responsible for owning and driving technical issues to resolution
What you'll need
Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field
8+ years FPGA/ASIC design with UVM verification experience
Foundational knowledge of digital logic and timing considerations
Strong written and verbal communication skills, ability to work with a geographically distributed team
Attention to detail, ability to follow process and coding guidelines, participate in code reviews and accept feedback
Experience with Programmable Logic EDA tools, such as AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify, SoftCore Micro embedments in MicroChip, etc.
Proven track record to design and implement FPGA/ASIC modules using Verilog and/or VHDL with UVM simulation and testbench development
Familiarity with designing and coding for re-use, maintainability and scalability
Desire to a member of a team, collaborating on large system designs
Work independently, take initiative, and take ownership of tasks and results
ship required
Must be able to obtain and maintain a United States Secret Clearance
This is a 100% onsite role and the incumbent will work out of one of these locations: Carlsbad, CA, Linthicum Heights, MD, Tampa FL, or Marlborough, MA
Ability to travel up to 10%
What will help you on the job
MSEE degree preferred
Familiarity with TCL, Perl, Python or another scripting language
Experience with high-speed interfaces like SERDES, DDR2/3/4, LVDS
Proven experience in debugging, diagnosing, and solving embedded designs issues
Experience with the rest of the FPGA design process, from the requirements phase to documentation, design, implementation of source code, place & route, testing in hardware, and integration
Experience and familiarity with Linux-based development environments
Active United States Secret Security Clearance
Salary range
$96,000.00 - $151,000.00 / annually.For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $115,500.00- $173,500.00/ annually
At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge, skills, and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits, dependent on the position offered. Learn more about Viasat's comprehensive benefit offerings that are focused on your holistic health and wellness at
EEO Statement
Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.