Platform Software Validation Engineer

Pala, CA, US • Posted 1 day ago • Updated 1 day ago
Contract Corp To Corp
Contract W2
1 Month
No Travel Required
On-site
Depends on Experience
Fitment

Dice Job Match Score™

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Job Details

Skills

  • C/C++
  • Validation
  • HIL

Summary

Hi,
 

Title: Platform Software Validation Engineer
Location: Palo Alto, CA – 4 days onsite (Local Only)

Interview Mode: Video

 

 

 

Job Description 

(ECUs). In this role, you will develop and perform hands-on post-silicon bench testing on microcontrollers,

validating Real-Time Drivers (RTD), the System Timer Module (STM), integrated automotive Ethernet

chipsets, and bootloaders.

 

You will own the end-to-end definition and execution of test methodologies designed to comply with ISO

26262 ASIL functional safety requirements while optimizing real-time network stack throughput. You will

architect automated test frameworks primarily controlled via Python frameworks, with flexibility to develop

target-side test code in C, C++, or Rust. Your expertise in embedded systems and automotive industry

knowledge will help ensure the quality and reliability of our software solutions.

 

What you’ll do...

• Post-Silicon Bench Testing & Hardware Validation

o Execute bench-level validation on physical silicon evaluation boards and custom

automotive ECUs.

o Configure and validate hardware peripherals, specifically focusing on the System Timer

Module (STM), memory protection units, and interrupt controllers.

o Integrate and verify PHY/switch drivers, validating high-speed automotive Ethernet

transceiver performance under varied environmental conditions.

o Bootloader & Flash Validation: Architect and execute test strategies for

primary/secondary bootloaders, validating secure boot sequences (cryptographic

signature verification), flashing routines via UDS (ISO 14229) over CAN/Ethernet, and

dual-bank OTA roll-back mechanisms on microcontrollers.

• Driver & Performance Verification

o Validate Real-Time Drivers (RTD) for bare-metal and AUTOSAR runtime environments.

o Benchmark network stack throughput and latency using network testing utilities like iperf,

CANoe, and hardware packet generators.

o Analyze complex communication layers including TCP/IP, SOME/IP, and DoIP over

automotive Ethernet interfaces.

• Functional Safety & Test Automation

o Design, implement, and maintain automated regression test frameworks controlled via

Python scripts.

o Develop target-side test applications in C, C++, or Rust when bare-metal deterministic

execution or strict memory safety verification is required.

o Author V&V test specifications mapped directly to safety goals to ensure compliance

across various safety levels (ASIL B to ASIL D) in alignment with ISO 26262 Part 6.

o Utilize advanced lab instrumentation (digital oscilloscopes, logic analyzers) and

debuggers to capture signals and isolate physical-layer anomalies.

 

You'll have...

• Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, Computer Science, or a

related STEM field.

• Processor Expertise: Hands-on experience debugging and validating microcontrollers (ie. ESP32,

ARM Cortex-M, etc.).

• Automotive Communication: Deep understanding of automotive networking protocols, including

Automotive Ethernet (100BASE-T1/1000BASE-T1), CAN FD, LIN, and Unified Diagnostic

Services (UDS / ISO 14229) for flashing configurations.

• Silicon Ecosystems: Proven familiarity with Realtek Ethernet transceivers/switches and

configuring low-level peripheral timers like the STM.

• Functional Safety Standards: Comprehensive understanding of ISO 26262 processes, hardware

software interface definitions (HSI), and safety-critical testing techniques.

• Software Toolkit: Strong programming fluency in Python for building bench automation

frameworks, alongside C for low-level embedded software inspection.

 

Even better, you may have...

• Automotive Network & Traffic Generation Tools

• Experience using dedicated automotive hardware interfaces and packet injection tools

such as Intrepid Control Systems RAD-Gigastar, Vector VN5610A/VN5640, or other

media converters.

• Familiarity with enterprise Layer 2/3 traffic emulation suites such as Keysight IxNetwork

or Spirent TestCenter to validate switch latency and throughput boundaries.

• Hands-on knowledge of network script automation using open-source packet

manipulation libraries like Scapy via Python.

• Hardware-in-the-Loop (HIL) & Debug Environments

• Advanced proficiency in automated debugging and memory trace extraction utilizing a

Lauterbach Trace32 debugger or other vendor-specific debuggers.

• Experience using bench automation and instrumentation platforms such as dSPACE

(ControlDesk/ConfigurationDesk) or Vector VT System for modular I/O and fault-injection

testing.

• Proficiency configuring low-level registers, clocks, and peripheral drivers via vendor

specific configuration tools.

• ISO 26262 Code Compliance & Dynamic Analysis

• Experience with target-based software testing and code coverage frameworks like QA

Systems Cantata or Parasoft C/C++test to enforce structural safety standards.

• Familiarity with static analysis and MISRA C/C++ compliance checkers such as QA

MISRA, Helix QAC, or Synopsys Coverity.

 

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: RTX17ee7d
  • Position Id: 1674-33630-1791470403
  • Posted 1 day ago
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