Senior RF / Electromagnetic (EM) Modeling Engineer

Sunnyvale, CA, US • Posted 9 hours ago • Updated 9 hours ago
Contract Corp To Corp
Contract W2
Contract Independent
6 Months
No Travel Required
On-site
Depends on Experience
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Fitment

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Job Details

Skills

  • HFSS
  • EMX
  • RaptorX
  • Momentum
  • Sonnet

Summary

Role: Senior RF / Electromagnetic (EM) Modeling Engineer
Location: Mountain View, CA (Onsite / Hybrid)


About the Opportunity

We are is seeking an experienced Senior RF / Electromagnetic (EM) Modeling Engineer for an advanced semiconductor and chip design program with a leading technology company in the Bay Area.

This role focuses on electromagnetic modeling and characterization of on-chip passive components, particularly inductors, capacitors, transformers, and LC tanks used in RF circuits, oscillators, PLLs, and other high-performance analog/RF applications.

The ideal candidate will bring strong hands-on experience with Ansys HFSS and IC-focused electromagnetic simulation tools, along with a deep understanding of RF passive behavior, circuit modeling, and silicon correlation.

Key Responsibilities

  • Develop and simulate electromagnetic models of on-chip passive components, including spiral inductors, transformers, baluns, T-coils, varactors, and MOM/MIM capacitors.
  • Perform full-wave EM simulations using Ansys HFSS and IC-focused EM tools such as Cadence EMX, Ansys RaptorX, Keysight Momentum, Sonnet, or Clarity 3D.
  • Extract and characterize key RF parameters, including inductance, quality factor (Q), self-resonant frequency (SRF), coupling coefficients, and S-parameters across relevant frequency ranges.
  • Develop lumped-element equivalent circuit models, including pi-models, and broadband models suitable for circuit-level simulations.
  • Collaborate with RF and analog circuit designers working on LC-VCOs, PLLs, LNAs, matching networks, and resonator-based circuits.
  • Evaluate the impact of passive component quality factor, parasitic effects, and capacitor-bank configurations on phase noise, frequency tuning range, and overall circuit performance.
  • Analyze electromagnetic coupling and parasitic effects associated with surrounding layout structures, including routing, metal fill, seal rings, substrate, package interconnects, and bumps.
  • Correlate EM simulation results with silicon measurements using Vector Network Analyzers (VNAs), RF probe stations, and appropriate de-embedding techniques.
  • Configure metal-stack technology files and PDK-related simulation environments for accurate passive component modeling.
  • Automate simulation workflows, parameter sweeps, and model extraction processes using Python or similar scripting languages.

Required Qualifications

  • Master's or PhD degree in Electrical Engineering, specializing in RF, microwave engineering, or electromagnetics. Bachelor's degree candidates with equivalent relevant industry experience will also be considered.
  • 5+ years of relevant industry experience in RF electromagnetic modeling, simulation, or on-chip passive component characterization.
  • Strong hands-on experience with Ansys HFSS, specifically for on-chip integrated circuit structures and passive components.
  • Practical experience with at least one IC-focused EM simulation tool:
    • Cadence EMX
    • Ansys RaptorX
    • Keysight Momentum
    • Sonnet
    • Cadence Clarity 3D
  • Strong understanding of RF passive components, LC tanks, and their applications in oscillators, PLLs, matching networks, and LNAs.
  • Experience integrating EM-extracted models into circuit simulation environments such as Cadence Virtuoso with Spectre/SpectreRF or Keysight ADS.
  • Strong understanding of S-parameters, Smith charts, impedance matching, and RF de-embedding techniques.
  • Ability to interpret simulation results, troubleshoot model discrepancies, and collaborate effectively with circuit design teams.

Preferred Qualifications

  • Experience with advanced semiconductor technologies, including CMOS, FinFET, or SiGe processes.
  • Exposure to millimeter-wave (mmWave) design and modeling, particularly at frequencies of 28 GHz and above.
  • Foundry, PDK, or process technology experience involving the development and characterization of on-chip inductor and capacitor models.
  • Hands-on laboratory experience with Vector Network Analyzers, RF probe stations, and on-wafer measurements.
  • Experience with silicon measurement correlation and de-embedding methodologies.
  • Exposure to cryogenic RF electronics, superconducting resonators, or low-temperature electromagnetic modeling.

Technical Skills & Keywords

EM Simulation: Ansys HFSS, Cadence EMX, Ansys RaptorX, Keysight Momentum, Sonnet, Clarity 3D

RF Passive Components: On-Chip Inductors, Spiral Inductors, Transformers, Baluns, T-Coils, Varactors, MOM Capacitors, MIM Capacitors, LC Tanks

RF Characterization: S-Parameters, Quality Factor (Q), Self-Resonant Frequency (SRF), Coupling Coefficient, Smith Charts, De-embedding

Circuit Simulation: Cadence Virtuoso, Spectre, SpectreRF, Keysight ADS

RF Applications: LC-VCOs, PLLs, LNAs, Matching Networks, RF Front Ends, Resonators, Phase Noise

Automation & Measurement: Python, Parameter Sweeps, VNA, RF Probe Stations, Silicon Correlation

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 10230026
  • Position Id: 897-15984-1793313602
  • Posted 9 hours ago

Company Info

About ChaTeck Incorporated

ChaTeck Inc, located in Santa Clara, CA formed by a team of highly experienced software architects, Managers and technology professional who have implemented numerous projects for fortune 50 companies for over a decade.

Our mission is to provide fast paced and efficient solutions in the area of e-commerce, Business Intelligence, Data Warehouse, m-commerce, application development and integration, database development, CRM and Mobile computing. 

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