FPGA Verification Engineer

Position: FPGA Verification Engineer
Location: Mountain View, CA (On-Site)
Long Term

Must Have Skills
Skill 1 Strong understanding of FPGA design principles and architectures
Skill 2 Proficiency in System Verilog and UVM verification methodology
Skill 3 Experience in FPGA verification
Good To have Skills
Skill 1 Experience with scripting languages (e.g., Python, Perl).

Job Description
Strong understanding of FPGA design principles and architectures.

• 5+ years of experience in FPGA design or verification.
• Familiarity with hardware description languages (e.g., VHDL, Verilog)
  Proficiency in System Verilog and UVM verification methodology.
  Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS).
  Knowledge of code coverage and functional coverage analysis.
  Excellent debugging and problem-solving skills.
  Strong communication and collaboration skills.
  
  Requirements
  Bachelor s or master s degree in electrical engineering, Computer Engineering, or a related field.
  Experience in FPGA verification.
  Experience with scripting languages (e.g., Python, Perl).
  Familiarity with hardware description languages (e.g., VHDL, Verilog).