DFT Engineer

Job Title: DFT Engineer Location: Santa Clara, CA Work Arrangement: Onsite Experience: 5+ Years JOB DESCRIPTION We are seeking an experienced DFT Engineer to join a cutting-edge Silicon Engineering team working on next-generation GPU and AI products. The ideal candidate will have strong expertise in Design for Test (DFT) architecture, scan, MBIST, LBIST, JTAG, ATPG, and silicon debug. This is an excellent opportunity for a hands-on DFT Engineer to contribute to complex ASIC/SoC designs and next-

Looking for a senior DFT Engineer with 812 years of relevant experience in Scan Insertion and ATPG Validation, with hands-on experience using Mentor Tessent and Synopsys DFT Compiler. DFT Scan Insertion / ATPG Validation Engineer Location: Santa Clara, CA Duration: 12 Months Experience: 812 years Required Skills: Strong experience in DFT Scan InsertionHands-on experience with ATPG ValidationStrong understanding of DFT methodologies, scan architecture, and ATPG flowsRequired Tools: Mentor Tesse

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Principal DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at our San Jose, California, Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT spe

Position : DFT Engineer Location : Austin,TX / San Jose,CA Duration : Long-term contract The Role We are seeking highly skilled and motivated Senior/Staff DFT (Design for Test) Engineers with a strong focus on high-performance digital design to take end-to-end ownership of robust, testable silicon, from early test strategy definition to verified DFT implementation, pattern generation, and silicon bring-up. You will join a multidisciplinary group creating next-generation accelerators where digita