ASIC Engineer

About the Position We are looking to hire an ASIC Physical Design Engineer, who is also experienced reading and writing RTL, to help us design, test and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure. This isn't a traditional PD role. We're a small team where everyone works across the chip design process, and we expect our PD engineers to l

About the Position We are looking to hire engineers with experience in both software and hardware design to help us build our FPGA or ASIC-based applications. We're big believers in the ability of tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our hardware engineering work, and we're looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. T

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price - and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missi

Overview As an FPGA Engineer at Susquehanna, you will sit at the cusp of hardware and trading and help us as we continue to build some of the industry's most cutting edge ultra-low latency trading environments. As one of the world's largest market makers, Susquehanna was one of the first high frequency trading firms to pioneer the use of hardware-accelerated trading systems. At Susquehanna, we don't believe in silos. We believe that people do their best work when they have the freedom to explor