Post Silicon Validation Engineering

Santa Clara, CA, US • Posted 11 days ago • Updated 11 days ago
Contract W2
On-site
Depends on Experience
Fitment

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Summary

Post Silicon Validation Engineering || Santa Clara, CA (Onsite) || Fulltime,

Position: - Post Silicon Validation Engineering
Location - Santa Clara, CA
Duration: Fulltime
Post Silicon Validation Engineering
  • BS Degree in EE with one or two years of experience
  • Knowledge of board bring up, HW troubleshooting skills and board testing as per the test plan
  • Familiarity of working in lab environment in electrical measurements of different IO interfaces(PCIE, USB, HMDI and I2C/SPI) and using Test Equipment like Oscilloscope, DAQ, Multi-meter, Power Supply and Logic analyser
  • Ability to read schematics and familiar with layout files (*.brd file using Cadance Allegro tool)
  • Knowledge of Basic Linux commands and understanding the execution flow of Python/bash scripts
  • Knowledge to assemble a x86 motherboard (e.g., connect SMPS, DRAM cards, PCIe, display, other peripherals, etc. to x86 motherboard)
  • Knowledge and hands-on experience on Silicon PVT characterization
  • Good communication and problem-solving skills, basic knowledge of common office software (Outlook, Excel, Word)  
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 10117909
  • Position Id: 26-04168
  • Posted 11 days ago
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