Sr. Process Integration Engineer

Description Develop advanced CMOS image sensor (CIS) process to meet performance targets under a defined schedule and budget. Collaborate with foundry partners to define and improve the CIS silicon, color and package process for each CIS technology. Provide support to production and design teams to improve yield and overall sensor performance, establishing process flow applicable to mass production. Design and manage silicon split lots with respect to project goals and schedules to achieve perfo

Description Design a characterization/testing plan and work with R&D teams and manufacturing engineers to resolve various technical issues to meet performance requirements; participate in product definition and provide DFM inputs; work in close collaboration with silicon foundry, imager characterization and pixel design; interact with foundry fab in improving all silicon process, color, and package issues; improve product yield and performance by process optimization and layout design update; a

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Description Technology pathfinding and integration engineer supporting multiple RF IC technologies for cellular RF front-end module development. Part of a global team that supports RF semiconductor technology (GaAs HBT, RF-SOI, RF-CMOS, RF-BiCMOS, GaN

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t