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ASIC Physical Design Engineer

• Posted 19 hours ago • Updated 19 hours ago

Full Time

On-site

Fitment

Dice Job Match Score™

👾 Reticulating splines...

Job Details

Skills

ASIC
Trading
Computer Networking
Research
Value Engineering
Collaboration
HATS
Productivity
Embedded Systems
Expect
Objective Caml
Computer Hardware
Place And Route
Timing Closure
Pure Data
RTL
Physical Data Model
Integrated Circuit
Software Engineering
Hardware Development
Python
C++
Haskell
Recruiting

Summary

{"description": " About the position

We are looking to hire an ASIC Physical Design Engineer to help us design, test, and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking, and research infrastructure.

This isn't a traditional PD role. We're a small team where everyone works across the chip design process, and we expect our PD engineers to lead with physical design expertise but think like chip designers. You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and reason about design decisions that cross the front-end/back-end boundary.

If you've spent your career exclusively in PD, this probably isn't the right fit- but if you've worked across the stack, either because you started as an RTL designer and moved into PD, or because you were on a smaller team where you had to wear multiple hats, we'd love to talk.

We're big believers in the ability of tools to improve the productivity, reliability, and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.

About you

You have hands-on experience building and running modern physical design flows (e.g., floorplanning, place and route, timing closure, physical verification, power analysis)
You don't need to have optimized every last detail of every flow, but you should have broad enough experience across PD that you can own a flow end-to-end and know where the risks are
Beyond PD, you can read and write RTL and understand how front-end design decisions affect physical implementation-and vice versa; You think about physical design in the context of the overall chip, not just as a downstream consumer of a netlist
You're interested in using software engineering techniques to improve the hardware design process, and you have experience programming in a high-level language (Python, C++, Haskell, etc.)

If you're a recruiting agency and want to partner with us, please reach out to ", "salary_raw": null}

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 90922487
Position Id: 24200313
Posted 19 hours ago

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