Embedded Software Engineer

Position: Embedded Software Engineer

Location: Kansa City, MO (100% REMOTE)

Contract: 12+ Months and extendable

Client: TORRI Technologies

Description:

We’re hiring a senior engineer to build high-performance, secure, low-level software spanning OS internals, device drivers, cryptography, and hardware-aware development. You’ll work primarily in C, C++, Rust, and Python, and as needed Verilog/VHDL for FPGA/SoC/ASIC workflows. You should be comfortable close to the metal—peripherals, memory, processors/co-processors—and able to implement secure systems using TLS and IPsec, with strong attention to in-memory security.

Responsibilities

Build performance-critical systems software in C/C++/Rust; use Python for tooling, tests, CI, and automation.

Develop and debug low-level components for Linux and Windows, including device drivers and kernel/user-space interfaces.

Work directly with hardware interfaces: interrupts, DMA, MMIO, PCIe/USB, IOMMU, memory ordering, and driver stacks.

Implement and integrate cryptography and secure communications (TLS 1.2/1.3, mTLS, IPsec/IKEv2), including PKI/cert integration and key handling.

Design for in-memory security (minimize plaintext lifetime, secure buffers, zeroization, prevent swap/pagefile leakage, crash dump considerations).

Profile, optimize, and troubleshoot latency, throughput, concurrency, and memory issues.

Contribute to FPGA/SoC enablement when needed (read/write Verilog/VHDL, testbenches, validation hooks).

Required Qualifications

7+ years in systems programming / low-level engineering (or equivalent depth).

Strong C/C++ and Rust; solid Python for engineering productivity.

Proven Linux expertise; Windows low-level/driver experience or ability to ramp quickly.

Experience with drivers/kernel modules or deep driver-stack/hardware interface work.

Practical cryptography integration experience (e.g., OpenSSL/BoringSSL/wolfSSL/libsodium, Windows CNG, Linux crypto APIs).

Strong fundamentals in computer architecture and OS concepts (MMU/virtual memory, caches, interrupts, DMA, concurrency).

Security & Compliance (Required Working Knowledge)

Must be able to build and document systems in a way that supports:

CMMC (as applicable to defense/regulated environments)

NIST SP 800-171 and NIST SP 800-172 aligned engineering and control expectations

ISO/IEC 27001-aligned security management and evidence expectations

SOC 2 security, availability, and confidentiality-oriented controls (as applicable)

Preferred (Nice to Have)

FPGA/RTL: Verilog/VHDL, simulation/synthesis workflows, timing-closure basics.

SoC/board bring-up, firmware/boot chains (UEFI/secure boot), TPM/HSM, TEEs (TrustZone/SGX/SEV/TDX).

Accelerators and high-performance I/O: GPU, DPU/SmartNIC, RDMA, kernel-bypass networking, packet processing.

Side-channel awareness/mitigations and secure build practices (reproducible builds, signing, SBOM/CBOM, fuzzing, static analysis).

Cryptography Requirements

Proven experience using cryptographic libraries/APIs safely (e.g., OpenSSL/BoringSSL/wolfSSL/libsodium, Windows CNG, Linux crypto APIs).

Understanding of crypto primitives and common protocols, with a focus on correct usage patterns, key lifecycle, and avoiding implementation pitfalls.

Preferred Qualifications (Nice to Have)

Ability to read and write Verilog and/or VHDL, including testbenches and FPGA-oriented validation work.

Experience with any of: FPGA toolchains and workflows (simulation, synthesis, timing closure basics; vendor tools a plus)

SoC bring-up, bootloaders/firmware, UEFI, secure boot chains

Accelerators and specialized compute: GPU, DPU/SmartNIC, RDMA, kernel-bypass networking, high-speed packet processing

Security hardware: TPM/HSM, TEEs (SGX/SEV/TDX/TrustZone), secure enclaves

Side-channel awareness and mitigations (timing/caching/power considerations)

Experience building secure, verifiable pipelines: reproducible builds, signing, SBOM/CBOM, fuzzing, static analysis.

Tech Stack (Representative)

Languages: C, C++, Rust, Python, Verilog, VHDL

OS: Linux, Windows

Protocols: TLS 1.2/1.3, mTLS, IPsec (IKEv2/ESP)

Tooling: clanMSVC, gdb/lldb/WinDbg, CI/CD, static analysis, fuzzing, profilers

Hardware/HDL: FPGA vendor tools, simulation frameworks, verification/testing infrastructure

Crypto: platform crypto APIs + common libraries; hardware-backed keys where applicable