Verification Engineer

Job Description:Hands-on experience with VC Formal (Synopsys) and/or Jasper Gold (Cadence)Strong proficiency in System Verilog Assertions (SVA) and formal property specificationExperience with formal verification applications: FPV, connectivity checking, register verification, equivalence checking, and coverage analysisFamiliarity with scripting languages (TCL, Python, Perl) for flow automationExtensive experience in design verification with a strong focus on formal verificationExpertise in Syst

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we're looking for talent who feel the same: people who want to leave the planet better than they found it, those who don't shy away from humanity's challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing

Formal Verification Engineer Austin, TX 12 + Months Role: Lead design verification using formal tools and spec analysis. Must Have: VC Formal or JasperGold, SystemVerilog Assertions (SVA), and FPV applications. Dexian stands at the forefront of Talent + Technology solutions with a presence spanning more than 70 locations worldwide and a team exceeding 10,000 professionals. As one of the largest technology and professional staffing companies and one of the largest minority-owned staffing compan

Job Overview: Arm's Solution Engineering team is very thrilled to work with SoC verification engineers in Austin! New team members in Austin will join hands with other RTL design and verification engineers spread across UK, US, France and India & Canada to build best in class SoC's! Arm is building a team to develop best-in-class silicon demonstrators based on Arm's IP compute sub-system solutions targeting premium mobile, infrastructure and automotive markets. Using the latest nodes (e.g. 3nm