At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Front End Design Engineering InternThe Cadence Tensilica CPU Processor Team is seeing rapid adoption of our industry leading processor cores and DSP's. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 Billion processor cores annually and expanding into intelligent system design and development.
Cadence Tensilica CPU Processor Team is hiring students to join our R&D teams in San Jose and Austin. This is an amazing opportunity to work as a an engineering intern at a world leader in computational software, semiconductor design IP, and system verification hardware. Our customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.
Come be part of this great Processor team where you can make an impact that is visible.
Perform as a member of the Logic Design Team for Xtensa processors.
Position Requirements:
- Currently enrolled in MS/BS major as Electrical Engineering, Computer Engineering, or equivalent.
- Good knowledge of computer architecture and pipelined designs is required. Understanding of compilers and operating systems is a plus.
- Excellent knowledge of Verilog/SystemVerilog and popular EDA simulation & implementation tools.
- Deep understanding of Digital Design and/or Design Verification Fundamentals.
- Good experience in scripting languages. Excellent knowledge of Perl is a plus.
- Excellent oral and written communications skills.
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