Apply Now

Analog and RF layout engineer

Sunnyvale, CA, US • Posted 1 day ago • Updated 23 minutes ago

Contract Corp To Corp

Contract Independent

Contract W2

On-site

Fitment

Dice Job Match Score™

🫥 Flibbertigibetting...

Job Details

Skills

Regulatory Compliance
Internal Communications
IC
Collaboration
CMOS
Routing
Integrated Circuit
Assembly
EDA
Data Analysis
Cadence
Mentorship
Synopsys
RF
Mixed-signal Integrated Circuit
Layout

Summary

Seeking an experienced Analog/RF Layout Engineer with 6+ years of expertise in designing and leading complex IC layouts for high-speed applications using advanced CMOS FinFET technologies (7nm and below). The role involves block-level and chip-level layout development, ensuring high performance, reliability, and compliance with design rules.

Key Responsibilities:

Develop and lead complex IC layouts for high-speed analog/mixed-signal designs.
Perform floorplanning, block-level routing, and top-level chip assembly.
Design layouts for transceivers, PLLs, CMOS drivers, and high-speed data converters.
Apply advanced layout techniques including thermal-aware design and electromigration considerations.
Collaborate with cross-functional teams to ensure design integrity and performance.

Mandatory Skills:

Expertise in advanced CMOS FinFET technologies (7nm and below) at block and chip level.
Strong experience in floorplanning, routing, and full-chip assembly.
Proficiency in EDA tools from Cadence, Mentor, and Synopsys.
Solid understanding of analog/RF and mixed-signal layout best practices.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 91128170
Position Id: OOJ - 12716-11717-1777325660
Posted 1 day ago

Create job alert

Never miss an opportunity! Create an alert based on the job you applied for.

Similar Jobs

PCB Layout Design Engineer

Milpitas, California

•

22d ago

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a PCB Layout Design Engineer. Job Description: Job Title: PCB Layout Design Engineer Job Type: Contract Job Location: Milpitas, CA Work Schedule: On-site Pay Rate: $64 Based on experience. Job Summary We are seeking an experienced Senior Electrical & PCB Layout Design Engineer to lead the design, development, and validation of complex electrical systems and hardware products

Easy Apply

Contract

Depends on Experience

High speed Board Design Engineer

San Jose, California

•

8d ago

Immediate need for a talented High speed Board Design Engineer .This is a 06-12+ months contract opportunity with long-term potential and is location in San Jose, CA/ Sunnyvale, CA(Onsite). Please review the job description below and contact me ASAP if you are interested. Job Diva ID: 26-12621 Pay Range: $ 45 - $50/hour. Employee benefits include, but are not limited to, health insurance (medical, dental, vision), 401(k) plan, and paid sick leave (depending on work location). Key Responsibili

Easy Apply

Contract

$45 - $50

Physical Design Engineer

San Jose, California

•

15d ago

Role: Lead Physical Design Engineer Location:San Jose, CA (Onsite) Type:Long-Term Contract (C2C) Looking for a Lead Physical Design Engineerwith strong experience infull-chip physical design and verificationfor advanced nodes. Key Skills Physical Design: Floorplanning, PnR, CTS, STAPhysical Verification & Timing ClosureStrong understanding ofRTL, Logic & Circuit DesignHands-on withEDA toolsExperience inTSMC 5nm / 3nmnodes What Youll Do Driveend-to-end physical designfrom floorplan to sign-offR

Easy Apply

Contract, Third Party

Depends on Experience

Senior RF Test & PCB Design Engineer

San Jose, California

•

Today

Duration: 12+ months contract Location: San Jose, CA (Onsite, 5 days/week) Description: PCB Development: Lead the schematic entry, component selection, and layout routing optimization for complex RF evaluation boards using Cadence Allegro.Simulation & Analysis: Perform Signal Integrity (SI) and Power Integrity (PI) simulations. Utilize Ansys HFSS for EM modeling and impedance matching to ensure optimal RF performance.Hardware Bring-up: Own the board bring-up process, including debugging hardware

Easy Apply

Contract

$60 - $80

Search all similar jobs