Interface IP DV Engineer

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t

IP DV Engineer Location:Santa Clara, California( onsite ) Duration: 12+ months Interview: Phone/ Skype-2Rounds End Client: L&T Visa: Any visa Linkedin Must have Job Description: Job Description & Skill Requirement: Job Description: 4 to 8 yrs We are seeking DV engineers to verify complex internal IP blocks such as compute engines, accelerators, and custom logic within SoC environments. Key Responsibilities: Develop and maintain UVM-based verification environments Crea

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Position Title: Staff ASIC Design Verification Engineer (Technical role) Position Description: This is a position for Staff technical member of Micron's ASIC Verification and Emul

Title DesignVerificationEngineer-Performance Modelling Location Sunnyvale CA, Austin TX or Remote Key ResponsibilitiesDevelop, maintain, and enhance STL (Scenario/Test List) generation scripts andperformancevalidation infrastructure.Monitorperformanceregression status and track keyperformanceindicators (KPIs) across IP and subsystem levelverificationenvironments.Analyze regression failures and collaborate with IP, Design, andDVowners to drive issue resolution.Debugverificationtests that fail t