Lead Product Engineer

San Jose, CA, US • Posted 3 days ago • Updated 1 day ago
Full Time
On-site
USD $114,800.00 - 213,200.00 per year
Fitment

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Job Details

Skills

  • DSG
  • Software Engineering
  • Integrated Circuit
  • Design Software
  • Place And Route
  • Research and Development
  • Benchmarking
  • Cadence
  • Innovation
  • Collaboration
  • Product Marketing
  • Roadmaps
  • Electrical Engineering
  • ASIC
  • RTL
  • FOCUS
  • Physical Data Model
  • Timing Closure
  • Optimization
  • EDA
  • Data Analysis
  • Routing
  • Scripting
  • Tcl
  • Python
  • Perl
  • Artificial Intelligence
  • Productivity
  • Communication
  • Sales

Summary

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Join Cadence's Digital and Signoff Group (DSG) as a Product Engineer, where you will act as the vital bridge between R&D, Application Engineering, and our global customers. In this high-impact role, you will influence the next generation of chip design software, helping industry leaders solve complex physical design challenges at 7nm and below.

Key Responsibilities
  • Technical Expert: Serve as the primary place-and-route (P&R) resource for internal development teams and external customers.
  • Product Evolution: Collaborate with R&D to track, diagnose, and resolve software issues, ensuring a robust tool release cycle.
  • Design Benchmarking: Execute competitive benchmarks to demonstrate Cadence's edge in Power, Performance, and Area (PPA).
  • Flow Innovation: Develop and deploy customized RTL-to-GDSII methodologies and scripts to meet specific customer design goals.
  • Strategic Collaboration: Partner with Product Marketing to align technical capabilities with market needs and customer roadmaps.

Requirements
  • Education:
    • BS in Electrical Engineering (EE) + 4 or more years of industry experience, OR
    • MS in Electrical Engineering (EE) + 2 or more year of digital implementation experience.
  • Core Expertise: Deep understanding of the full ASIC design flow (RTL-to-GDSII) with a focus on physical design and timing analysis.
  • Advanced Node Experience: Proven hands-on experience with timing closure and PPA optimization at 7nm, 5nm, or below.
  • Tool Proficiency: High familiarity with industry-standard EDA tools for synthesis, placement, routing, and signoff.
  • Scripting Skills: Proficiency in Tcl, Python, or Perl (familiarity with AI-driven productivity tools is a major plus).
  • Communication: Strong verbal and written skills to translate complex technical issues into actionable solutions.

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We're doing work that matters. Help us solve what others can't.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: CADENCE
  • Position Id: d81419ed50e82681db5f46ac8524b340
  • Posted 3 days ago
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