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Job Function: R&D Product Development
Job Sub Function: R&D Electrical/Mechatronic Engineering
Job Category:Scientific/Technology
All Job Posting Locations:Santa Clara, California, United States of America
Job Description:About SurgeryFueled by innovation at the intersection of biology and technology, we're developing the next generation of smarter, less invasive, more personalized treatments.
Are you passionate about improving and expanding the possibilities of surgery? Ready to join a team that's reimagining how we heal? Our Surgery team will give you the chance to deliver surgical technologies and solutions to surgeons and healthcare professionals around the world. Your contributions will help effectively treat some of the world's most prevalent conditions such as obesity, cardiovascular disease and cancer. Patients are waiting.
Your unique talents will help patients on their journey to wellness. Learn more at ;br>
An internal pre-identified candidate for consideration has been identified. However, all applications will be considered.We are searching for the best talent for Staff FPGA Engineer.As a Staff FPGA Engineer focused on visualization systems for surgical robotics, you will play a key role in designing and delivering advanced real-time imaging and vision platforms used in next-generation robotic surgery. You will collaborate closely with cross-functional partners across hardware, firmware, and software to architect and implement FPGA-based solutions that enable low-latency, high-reliability video and image processing pipelines. In this role, you will drive critical technical decisions, lead complex design efforts, and deliver production-ready logic that meets deterministic timing requirements while supporting highly parallel vision algorithms. This position offers meaningful technical leadership, strong growth opportunities, and the chance to make a tangible impact on patient outcomes and global healthcare through cutting-edge surgical visualization technology.
Responsibilities:- Lead design, development and optimization of FPGA architecture for real time video and image processing pipelines
- Implement high-performance data paths for Vision platforms including interface with image sensors and design for low latency
- Develop and maintain FPGA designs using SystemVerilog for Xilinx Zynq Ultrascale+ MPSoc platforms
- Optimize designs for power, performance and resource utilization
- Perform design verification through simulation and hardware validation to ensure all performance and functional requirements are met.
- Collaborate cross-functionally with firmware and software engineers for end-to-end system integration
- Test, debug and successfully release FPGA designs for prototype and production systems.
- Document design specifications, architecture and test results
Skills:- Bachelor's degree in electrical engineering or related field with 10+ years of related work experience
- 10+ years of experience with FPGA design and embedded systems for medical applications
- Experience with image sensor, video/image processing and image acquisition systems
- Proficiency in Verilog/SystemVerilog RTL design
- Deep understanding of Xilinx FPGA architecture and working with Xilinx's Vivado & Vitis tools, static timing analysis, timing constraints and closure methodologies
- Extensive experience working on Xilinx Zynq based systems
- Demonstrated knowledge of communication protocols such as AXI4, MIPI CSI-2 DDRx, PCIe, SDI, etc
- Proficiency with developing functional simulations to verify FPGA code using simulation tools such as QuestaSim
- Experience with repository management and revision control software tools (e.g git) and CI/CD workflows
Johnson & Johnson is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, age, national origin, disability, protected veteran status or other characteristics protected by federal, state or local law. We actively seek qualified candidates who are protected veterans and individuals with disabilities as defined under VEVRAA and Section 503 of the Rehabilitation Act.
Johnson and Johnson is committed to providing an interview process that is inclusive of our applicants' needs. If you are an individual with a disability and would like to request an accommodation, please email the Employee Health Support Center () or contact AskGS to be directed to your accommodation resource
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Required Skills:Preferred Skills:Coaching, Consulting, Critical Thinking, Design Mindset, Design Thinking, Feasibility Studies, Organizing, Problem Solving, Product Knowledge, Program Management, Project Reporting, Quality Focus, Research and Development, Robotic Automation, SAP Product Lifecycle Management, Smart Systems, Technical Research
The anticipated base pay range for this position is :$134,000.00 - $231,150.00
Additional Description for Pay Transparency:
Subject to the terms of their respective plans, employees are eligible to participate in the Company's consolidated retirement plan (pension) and savings plan (401(k)).
Subject to the terms of their respective policies and date of hire, employees are eligible for the following time off benefits:
Vacation -120 hours per calendar year
Sick time - 40 hours per calendar year; for employees who reside in the State of Colorado -48 hours per calendar year; for employees who reside in the State of Washington -56 hours per calendar year
Holiday pay, including Floating Holidays -13 days per calendar year
Work, Personal and Family Time - up to 40 hours per calendar year
Parental Leave - 480 hours within one year of the birth/adoption/foster care of a child
Bereavement Leave - 240 hours for an immediate family member: 40 hours for an extended family member per calendar year
Caregiver Leave - 80 hours in a 52-week rolling period10 days
Volunteer Leave - 32 hours per calendar year
Military Spouse Time-Off - 80 hours per calendar year
The following link to general company benefits information MUST also be included in the posting: Please use the following language:
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