CPU Implementation Engineer

Santa Clara, CA, US • Posted 5 hours ago • Updated 5 hours ago
Full Time
On-site
Fitment

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Job Details

Skills

  • Computer Hardware
  • Innovation
  • Recruiting
  • RTL
  • Place And Route
  • Level Design
  • Electrical Engineering
  • Pure Data
  • Intellectual Property
  • IP
  • Macros
  • Tcl
  • Perl
  • CPU
  • Microprocessor
  • Logic Synthesis
  • Static Timing Analysis
  • Budget
  • Communication

Summary

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! \\n\\nApple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.

As a CPU Implementation Engineer, you will drive or participate in the following:\n\n Work with micro-architects to help define the micro-architecture and assist with design feasibility and power, performance, and area (PPA) trade-offs\n Drive RTL-to-GDS design convergence through microarchitecture and logic (RTL) optimizations using synthesis and place-and-route tools targeting ambitious goals for PPA\n Responsible for block-level design delivery along with closure of backend flows, electrical requirements, and improving silicon yield\n Work closely with internal CAD and PD methodology teams on industry-standard synthesis/PNR tool features and optimizations and their adoption in CPU design\n Work with x-functional top-level teams on the aspects of CPU floorplan, timing, power, reliability, and testability\n Work closely with custom IP teams to define and co-optimize memory macros, library standard cells to improve design PPA

Minimum BS and 3+ years of relevant industry experience\nExperience in logic design and digital circuits\nExperience with TCL or Perl

Familiarity with high performance CPU microprocessor architecture\nMust have experience in using industry standard logic Synthesis, PnR, STA and Power analysis tools, along with floor-planning, pin-placement and timing budgeting \nAbility to work well in a team, self-motivated and excellent communication skills
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90733111
  • Position Id: fd2fb6f173ec6e2e10a9ddd9ceb168fe
  • Posted 5 hours ago
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