FPGA Design/Verification Engineer

Location: Englewood, CO
Salary: $80.00 USD Hourly - $90.00 USD Hourly
Description:
Job Description: ASIC & FPGA Verification Engineer

Location: Littleton, CO

Summary:

We are seeking a highly skilled ASIC & FPGA Verification Engineer to join our R&D team. The ideal candidate will be an expert in Universal Verification Methodology (UVM) and possess strong experience in verifying FPGA and ASIC designs.

Responsibilities

Develop and maintain UVM-based verification environments, including testbenches, tests, and coverage models for FPGA and ASIC designs.

Drive automation initiatives by creating efficient verification scripts and methodologies to enhance FPGA verification processes.

Collaborate closely with cross-functional teams, including RTL designers, system architects, RF/Analog & Digital circuit designers, and ASIC/FPGA engineers, to deliver cutting-edge products.

Contribute to simulation, verification, integration, and testing of complex, high-speed networking systems.

Provide technical guidance and mentorship to junior engineers, fostering a culture of innovation and excellence.

Qualifications

Proven experience in FPGA and/or ASIC verification using UVM.

Strong understanding of high-speed networking concepts and complex system design.

Proficiency in developing automated verification solutions.

Excellent communication and collaboration skills for cross-disciplinary teamwork.

Ability to lead technical discussions and provide direction to junior team members.

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Contact:

This job and many more are available through The Judge Group. Please apply with us today!