ASIC Digital Engineer

Role: ASIC Frontend Digital Implementation Engineer
Location: Atlanta GA (Onsite)
Duration: 8 months+ contract duration
Job Type: C2C
Interview: 2 rounds of virtual interview

Job Description:

·         Looking for a skilled ASIC Frontend Digital Implementation Engineer with experience with Digital Implementation Tools from Synopsys, Cadence, and/or Siemens EDA vendors.

·         Candidates with 10+ years of implementation experience are ideal, but Synaptics would also consider <10y experience to optimize cost.

·         The ideal candidate will have worked on low-geometry implementation FinFET process nodes like TSMC12 or below.

·         This role involves digital synthesis, DFT insertion, working with the external PNR team for backend implementation, STA, LEC, and digital signoff. The contractor will take RTL from in-house digital design team, push through the frontend flow, and support multiple 2-3M instance partitions implementation and signoff through project tapeout.

Key Responsibilities

·         Executes the digital logic synthesis, DFT insertion, PNR team support, and signoff for multiple Synaptics design partitions.

·         Implement and iterate on SDC timing constraints to meet timing requirements for each partition.

·         Utilize existing in-house frontend digital implementation flows based on Synopsys (Design Compiler, Formality, Primetime) and Siemens (Tessent) EDA tools for above tasks.

·         Perform iterations of various levels of design and timing quality for each digital partition with support from internal RTL team and external backend PNR vendor.

·         Meet internal quality metrics for each iteration, with the final one being foundry required signoff quality for tapeout in Dec 2026.