SerDes System Validation Engineer

We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes IP. In this highly visible role, you will actively work within Analog-Mixed/Signal design team and participate in validation and debug of embedded circuits; collaborating with many teams to enable the world's premiere products. You will closely work with a hard-working group of Analog-Mixed/Signal designers working diligently to deliver hard IPs to Apple's products while exceeding the highest expectations of quality, innovation and efficiency.\\n\\nAt Apple, we work every day to craft products that enrich people's lives. In doing so, we face exciting challenges driven by the increasing complexity of SoC and PHY design. If you have strong technical fundamentals and a proven record of tackling complex problems-fueled by curiosity, a passion for learning, and a desire to enhance the impact of your work-we'd love to hear from you.\\n\\nIf you thrive on understanding the bigger picture while diving deep into the details to innovate and find elegant solutions. You enjoy collaborating with diverse teams to achieve extraordinary results, maintaining a strong team spirit even when facing tough challenges. Most importantly, you care about society and demonstrate leadership through your commitment to meaningful causes.\\n\\nWe have an opportunity for a forward-thinking and especially hardworking system validation engineer with strong background in high-speed serial links. As a member of our dynamic team, you will have the rare and rewarding opportunity to work on upcoming products that will surprise and delight millions of Apple's customers every day. \\n\\nAnd all of this while enjoying a great culture where you own your career.

Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in system.\n\nWork with design teams to understand the architecture and define DFT needs to help enhance testability and first-time silicon success. \n\nBe involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher level control logic.

Minimum requirement of a bachelors degree.

Able to think outside of the box and come up with creative solutions for system validation.\n\nKnowledge of system level considerations e.g. ESD requirements.\n\nVery knowledgeable about and experienced with common high-speed SerDes protocols (e.g., PCIe, USB, UCIe, OIF, etc.).\n\nExperience with system bring-up of high-speed serial links, lab testing, and defining equipment needs.\n\nVery knowledgeable in scripting (e.g. python, C, Matlab) for automation of validation efforts. \n\nExperience with system level S/W setup. \n\nExperience in mixed-signal circuit pre-silicon verification and ability to closely work with circuit design team.\n\nKnowledge of DFT to aid in the system validation.\n\nExperience in leading mixed-signal SerDes system validation.\n\nExperience with silicon bring-up, debug and production ramp.\n\nKnowledge of SerDes design and architecture including CDR and equalization.\n\nKnowledge of with Tx/Rx equalization techniques and adaptation.\n\nKnowledge of link jitter budget for high-speed serial links and key block level requirements.\n\nKnowledge of ADC based links and equalization techniques.\n\nFamiliarity with PCB design and specifications.\n\nStrong communication, teamwork and problem-solving skills. \n\nProven track record of delivering under difficult debug and validation scenarios.