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San Diego, California
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Today
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Job Overview: Design adaptive power management controller, on-chip sensor controller and digital power meter.Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks.Work closely with technology/circuit design team to close IP block specification/requirement.Work cl
Full-time
USD 115,600.00 - 173,400.00 per year
We're seeking a Low Power Principal Engineer/ASIC Engineer to join our team in San Diego, CA!
Key Responsibilities:
- Low power design and verification (UPF, VCLP)
- Power analysis and optimization (PTPX)
- STA and timing analysis
- Synthesis and physical design (DC synthesis)
Requirements:
- 5+ years of experience in ASIC design, low power design, and verification
- Proficiency in scripting languages (Shell, TCL, Perl, Python)
- Experience with VCLP, PTPX, Formality, LEC, and DC synthesis
What We Offer:
- Competitive salary and benefits package
- Opportunities for professional growth and development
- Collaborative and dynamic work environment
If you're passionate about low power design and ASIC engineering, let's connect! "