RF DVT (Design Verification Test) Engineer

Job Title: PCIE Engineer Location: San Jose,CA Key skills: Zebu, FPGA , PCIe(All generations) , PCIE Serdes, ARM Higly Skilled Engineer to work on validating and debug the the ULTRA low power designs on emulation and post silicon platforms. Develop and execute test plans in C to validate the Features. In depth knowledge of one or more peripheral protocols and specifications Bare metal/Linux driver development, Firmware development experience and excellent C programming skills. Platform/Board le

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. WIRELESS INTEGRATION & VALIDATION ENGINEER (STARLINK MOBILE) The Starlink Mobile network will expand Starlink's vision by providing ubiquitous connectivity and seamless access to text, voice, and data for phones and d

Job description below We are seeking engineering services to assist in the outsourcing of test plan Execution Key Qualifications: Understanding of RF fundamentals and communications theory Scripting Python code level for test automation and data processing Experience in Radio Frequency (RF) testing, including proficiency in using laboratory instruments like SA, signaling testers, VNA, etc. Eective communication skills in English for clear articulation of test results and issues encountered. We

Job Title:UFS Engineer Location: San Jose,CA Key skills: Zebu, FPGA ,UFS , ARM Develop and execute verification test plans for UFS host IP within a System-on-Chip (SoC) environment using tools like emulation platforms (Veloce, ZEBU, HAPs). Debug failures using waveform viewers and log files to isolate and root cause issues in UFS protocols and bus interconnects Create prepost silicon Validation C bases Test content . Enable firmware-driven validation on emulation platforms to integrate UFS driv