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Sr Principal Application Engineer - Emulation

• Posted 3 days ago • Updated 5 hours ago

Full Time

Fitment

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Job Details

Skills

Presentations
Product Demonstration
WINS
Marketing
Cadence
IT Management
Computer Science
Writing
Scripting
Perl
Python
Tcl
HDL
SystemVerilog
VHDL
Verilog
Communication
Collaboration
Teamwork
Research and Development
Emulation
Prototyping
Interfaces
FPGA
RTL
Xilinx
Altera
Debugging
C
C++
SystemC
System On A Chip
Embedded Software
JTAG
UART
PCI Express
AMBA
DDR SDRAM

Summary

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

In this role, you will develop customer specific emulation and prototyping requirements, including advanced acceleration component development, methodology support, and operation and maintenance of Cadence's emulation and prototyping tools and services. You will support technical evaluations and benchmark development for Cadence's market leading tools such as Palladium acceleration and emulation platform and Protium prototyping platform. You will create and conduct technical presentations and product demonstrations for customers.

Responsibilities

Establish technical credibility and rapport with the customer and become the go-to expert for all of their technical inquiries and support
Provide in-depth technical assistance in collaboration with R&D to help support advanced verification flows to secure design wins
Champion the customer needs and work closely with R&D and marketing to develop competitive and creative technical solutions
Understand the competitive landscape and continuously work on differentiating Cadence's solutions
Write technical product literature such as application notes and technical articles
Review new product proposals and device specifications
Assume technical leadership roles in team as needed

Requirements

Minimum:

MS.or PhD degree in Computer Science, Engineering, or related field
Strong RTL and Testbench debug skills
Experience in Synthesizable coding style
Experience in writing scripts (Perl, Python or TCL)
Strong software, HDL design and verification skills
Experience with SystemVerilog, VHDL, Verilog, C/C++/SystemC
Ability to quickly analyze verification environments and design complexity
Strong verbal and written communication skills
Strong teamwork skills
Ability to interact effectively with both external customers and R&D teams
5+ years industry experience

Preferred:

Experience in HW acceleration, in-circuit Emulation or FPGA prototyping
Experience with multiple clock domains and asynchronous interfaces
Knowledge of the FPGA development process & tool flow from RTL to bitstream for Xilinx and/or Altera products
Hands on experience with lab bring up, debug, chipscope and instrument usage
Experience with C/C++/SystemC
Knowledge of fundamental SoC Architecture knowledge
Understanding of embedded software development and HW/SW co-design and co-verification
Knowledge of protocols like JTAG, UART, PCIe, AMBA, DDR, CHI
Knowledge of design fundamentals such as architecture, micro-architecture, HDLs and Synthesis and timing

We're doing work that matters. Help us solve what others can't.

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: CADENCE
Position Id: 8bde85f1466c4e7e6231353b69a0d3c5
Posted 3 days ago

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