Summary:

A leading chip and silicon IP provider is seeking a highly skilled SPE Validation Engineer to join its Memory Interface Chip team. In this full-time hybrid role, you ll work alongside some of the brightest engineers to validate and optimize cutting-edge memory technologies that make data faster and more secure.

This role reports to the Director of Verification and will focus on validating high-speed memory buffer semiconductor products. The ideal candidate will have hands-on lab experience, strong scripting skills for automation, and deep familiarity with processor-memory interfaces, including DDR4/5 protocols and high-speed signaling concepts.

Responsibilities:

Lab bring-up and validation of high-speed memory buffer semiconductor products.
Develop test methodologies for validating silicon designs against specifications.
Develop scripts for automating lab equipment and for analyzing lab data.
Support Applications Team in understanding and resolving customer issues.
Work with silicon design teams to develop experiments, drive data collection, and present results analysis.

Requirements:

5+ years of direct hands-on experience with Advantest 93K (PS9G/PSSL or HSM required)
Hands-on experience with DDR4/5 memory system validation
Strong scripting skills for lab automation and data processing
Knowledge of processor / memory system architecture is desirable
Understanding of high-speed interface concepts, including signal integrity is desirable
Working knowledge of test and measurement equipment, troubleshooting and debugging is desirable
Hands-on hardware experience with x86 computer systems is desirable
Fast learner with a strong interest in hands-on lab work
Collaborative team player who works well with lab engineers and circuit designers

Education: B.S. or M.S. in Electrical Engineering AND 8-10 years experience is a strong plus

Location: Johns Creek, GA; San Jose, CA; Agoura Hills, CA; Morrisville, NC

Salary Range: $170k-$220k (DOE)

No 3rd party agencies or C2C

Validation Engineer (DDR4/DDR5)

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