High-Speed Analog Layout Engineer

3Core Systems, Inc is an SAP and SuccessFactors Partner with employees located across the United States. Our organization is dedicated to customer and employee satisfaction. We provide High Quality, cost-efficient, and Competitive Solutions and Resources.

3Core Systems Inc, is looking for a High-Speed Analog Layout Engineer for one of our clients in Austin, TX (Hybrid)

Candidates authorized to work in the US are encouraged to apply. We are unable to sponsor visas at this time

Role: High-Speed Analog Layout Engineer
Location: Austin, TX (Hybrid)
Duration: 6-12 Months Contract

TSMC 4NM (Must Have)

• High-Speed Analog Layout Engineer designs the physical silicon layout for high-frequency or high-speed mixed-signal circuits (such as SerDes, ADCs, DACs, PLLs, and High speed blocks).
• Floor Planning & Integration: Create block-level and chip-top-level floor plans, manage hierarchical block integration, and handle micro-bump or package-aware co-design
• Parasitic & Noise Control: Address layout-dependent effects (LOD, WPE, LDE), device matching, common-centroid structures, guard rings, and isolation or shielding (coaxial, differential, ground shields). [1, 2, 3]
• Reliability & Verification: Ensure complete closure on DRC (Design Rule Check), LVS (Layout Versus Schematic), ERC, antenna rules, EM/IR (Electromigration / Infrared drop) reliability, and ESD protection
• Generally 5 to 12+ years of hands-on custom IC layout experience in deep sub-micron or advanced CMOS/FinFET nodes (such as TSMC N3, N5, N7)
• Experience at Lower node (N3, N5) is critical for this position.

Regards,

Recruiting Team

3Core Systems Inc

9101 Burnet Road, Suite 207, Austin, TX 78758