Design Verification Lead || Onsite Role || Austin, TX / Bay area, CA / Boston, MA
Austin, TX, US • Posted 1 day ago • Updated 15 minutes ago

Innovise IT LLC
Dice Job Match Score™
📊 Calculating match score...
Job Details
Skills
- Design Verification
- UVM
Summary
Role: Design Verification Lead
Location: Austin, TX / Bay area, CA / Boston, MA || Onsite Role
Job Description-:
We are looking for a skilled Design Verification Engineer to ensure the robustness and functionality of our next-generation digital designs. You will be responsible for "breaking" the design by creating sophisticated test environments, identifying critical bugs before tape-out, and ensuring 100% functional coverage.
Key Responsibilities
Verification Planning: Develop detailed test plans based on architectural specifications to identify all likely points of failure.
Testbench Development: Build and maintain scalable, reusable verification environments from scratch using SystemVerilog and UVM (Universal Verification Methodology).
Test Case Creation: Write directed and constrained-random test cases to cover corner scenarios and ensure design completeness.
Coverage Closure: Define and implement functional and code coverage models; analyze reports to identify and close coverage holes.
Debug & Analysis: Use waveform tools (e.g., Verdi, DVE) to debug simulation failures and collaborate with RTL designers to resolve root causes.
Formal Verification: (Optional/Senior) Apply formal tools to prove design properties and catch complex bugs that simulation might miss.
Automation: Develop scripts (Python, Perl, or Shell) to automate regression runs and result parsing.
- Dice Id: 91159582
- Position Id: 8873668
- Posted 1 day ago
Similar Jobs
It looks like there aren't any Similar Jobs for this job yet.
Search all similar jobs

