Develop high-performance trading systems using C++17/20 (market data, order routing, pre-trade risk)
Build low-latency architectures (lock-free, cache-aligned, zero-copy systems)
Design and optimize Linux kernel environments (IRQ, RCU, scheduler, NUMA, CPU pinning, huge pages)
Implement kernel bypass networking using DPDK, RDMA, Mellanox, Solarflare/OpenOnload
Develop and optimize market data pipelines, multicast systems, and exchange connectivity (NASDAQ, NYSE, CME, ICE, OPRA)
Design FPGA-based solutions (feed handlers, order gateways, packet filtering) using Xilinx (UltraScale+/Versal) and Intel (Stratix/Agilex)
Work on hardware/software co-design (PCIe, DMA, HBM, SmartNICs)
Perform NIC tuning, firmware optimization, PCIe configuration, and DMA optimization
Implement PTP / IEEE-1588, hardware timestamping, and rdtsc-based timing
Build nanosecond-level profiling and monitoring tools using perf, eBPF, ftrace, flame graphs
Optimize systems for tick-to-trade latency, jitter reduction, and deterministic performance
Support real-time trading environments, working with traders and quants for performance tuning
14+ years in HFT / trading / low-latency systems
Strong expertise in C++17/20 and Linux kernel internals
Experience with CPU/NUMA optimization, cache tuning, real-time Linux
Hands-on with DPDK, RDMA (RoCE/iWARP), kernel bypass networking
Strong experience with FPGA development (Xilinx, Intel) and Verilog / VHDL
Knowledge of PCIe, DMA, SmartNICs, ASIC/Hardware acceleration
Experience with exchange protocols and market data systems
Expertise in performance tuning, latency optimization, and profiling tools
Familiarity with PTP timing, hardware clocks, nanosecond profiling
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