FE Engineering

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Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Understand system requirements for wireless ICs and design pre-silicon HW emulation and prototyping platforms using extensive experience with SystemC design and high-level synthesis methodology. Design Verilog RTL for signal processing blocks in wireless ICs. Work with emulation/FPGA platforms such as HAPS, Palladium, Protium. Work with SoC design and design verification to deliver designs to emulation and prototyping team. Work with design, silicon validation, and software teams to triage design/performance issues during platform bring-up and drive solutions. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: ;br>
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, or related field and 1 year of experience in the job offered or related occupation.

Experience and/or education must include:

Utilizing SystemVerilog or Verilog or VHDL to design RTL for signal processing blocks

Writing firmware or software in C or C++ or SystemC that controls HW blocks

Experience with MATLAB in modeling and simulating signal processing blocks

Experience with using FPGA and emulation platforms for test and bring-up of RTL blocks

Experience with debug of issues found on FPGA and emulation platforms

Utilizing synthesis and timing closure tools to evaluate area, timing, and power of RTL blocks

Experience with quality check tools for CDC and DFT.

Preferred Qualifications

N/A