CPU Clock Implementation Engineer

Santa Clara, CA, US • Posted 9 hours ago • Updated 9 hours ago
Full Time
On-site
Fitment

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Job Details

Skills

  • Computer Hardware
  • Innovation
  • Recruiting
  • Scripting
  • Perl
  • Tcl
  • System On A Chip
  • Physical Data Model
  • SPICE
  • Formal Verification
  • Design For Manufacturability
  • CPU
  • CMOS
  • Circuit Design
  • Extraction
  • Static Timing Analysis
  • Computer Architecture
  • Communication

Summary

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!\\n\\nApple's Silicon Engineering Group (SEG) is hiring skilled engineers for CPU. As a CPU Clock Implementation Engineer, you will be driving the planning, design, implementation, and analysis of clock.

As a CPU Clock Implementation Engineer, you will participate in the following:\n\n Work on clock planning, building simulation models, and physical implementation\n Work on clock analysis\n Engage on physical design of blocks\n Scripting to automate tasks and improve efficiency

Minimum BS and 10+ years of relevant industry experience\nProgramming and scripting experience in Perl and TCL

The ideal candidate will have physical design, analysis, and verification experience working on a large processor and/or SoC designs\nKnowledge of industry standards and practices in physical design, analysis, and physical verification\nExperience in developing and implementing clock specifications\nSolid knowledge of low power design, physical construction, Spice, formal verification, physical verification, and DFM\nUnderstanding of std cell architecture, design, and characterization flows\nUnderstand reliability aspects of clock cell design\nExperience understanding usage patterns and impact of std cells on high speed CPU design is a plus\nProven understanding of CMOS circuit design\nLayout design background is a plus\nKnowledge of extraction and STA methodology and tools\nKnowledge of computer architecture\nStrong communication skills\nAbility to work well in a team, problem solver, and self-motivated
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90733111
  • Position Id: 9b5f4ab5c49cc94022c0a22633130034
  • Posted 9 hours ago
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