TPI Global (formerly Tech Providers, Inc.)

Apply Now

PCIe SSD Validation Engineer

Santa Clara, CA, US • Posted 5 days ago • Updated 1 hour ago

Full Time

On-site

Fitment

Dice Job Match Score™

🤯 Applying directly to the forehead...

Job Details

Skills

Collaboration
OCP
ROOT
Test Suites
Oscilloscope
Logic Analyzer
Roadmaps
Leadership
Reporting
SSD
Storage
Embedded Systems
Computer Engineering
Electrical Engineering
Python
Linux
Continuous Integration
Regression Analysis
Jenkins
Git
Workflow
Test Execution
PCI Express
Debugging
Communication
Attention To Detail

Summary

Job Description

Job Title: PCIe SSD Validation Engineer
Location: Santa Clara, CA - Onsite
Duration: 06 month with possible extension

Execute PCIe validation: Execute Gen4/Gen5/Gen6 link and protocol tests across different platforms and system configurations.
Validate SSD behaviour under abnormal and corner conditions & provide periodic PCIe validation readouts for critical program milestones.
Collaborate: Triage failures from regression, bring up, and customer scenarios;correlate PCIe traces, NVMe/OCP logs, and system logs. Partner with FW, HW, and systems teams to root cause and verify fixes, and roll improvements back into the test suite.
PCIe tools: Leverage PCIe analyzers/exercisers for trace capture, error injection. Use oscilloscopes, logic analyzers, BERTs, and related tools (as needed) to support signal and protocol level debug.
Test Roadmap & leadership: Lead coverage improvements based on lessons learned, standardize PCIe test APIs, logs, and reporting for reuse across products & share PCIe debug and test BKMs

Requirements:

6+ years'experience in SSD, storage, or PCIe centric validation / bring up (or equivalent embedded / high speed I/O domain).
Master's or Bachelor's Degree in Computer Engineering or Electrical Engieering
Comfortable with Python (or similar) for test and tooling development;able to work effectively in Linux based validation environments.
Experience with CI / regression infrastructure (e.G., Jenkins, Git based workflows) for large scale test execution.
Hands on experience using PCIe analyzers/exercisers (e.G., Teledyne/LeCroy, Keysight, or similar) for trace capture and debug is a plus
Strong debug skills across HW/FW/system boundaries is a plus
Clear written and verbal communication, with the ability to present findings, trade offs, and recommendations to engineering and program teams.
Highly self motivated, detail oriented, and comfortable operating in a fast paced development environment.

Meet Your Recruiter

Elizabeth Henderson

Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.

Dice Id: 10375359
Position Id: bc79d82e8750934facf0211977001d1b
Posted 5 days ago

Create job alert

Never miss an opportunity! Create an alert based on the job you applied for.

Similar Jobs

PCIe Validation Engineer

Santa Clara, California

•

Today

Description Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team, we'd l

Full-time

USD 159,000.00 - 239,000.00 per year

T4 - Hardware & Silicon Validation Senior Staff Engineer

Santa Clara, California

•

Today

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleetin

Full-time

USD 127,630.00 - 191,200.00 per year

Principal PHY SerDes Validation Engineer

Santa Clara, California

•

Today

Full-time

USD 150,680.00 - 225,700.00 per year

Principal Silicon Validation Engineer, SerDes/PAM4

San Jose, California

•

Today

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL , Ethernet, NVLink, PCIe , and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-t

Full-time

USD 185,000.00 per year

Search all similar jobs

More jobs at TPI Global (formerly Tech Providers, Inc.) in Santa Clara, CA