Title: System Firmware Test Engineer - Hybrid
Mandatory skills:
Pre- silicon firmware, post-silicon firmware, system test environments,
SoC, System on a Chip, Debugging,
Computer Architecture concepts, enterprise server platform,
C, C++, scripting languages, Python, Perl, Bash,
AI applications, LLM-backed tools, RAG architectures, testing pipelines,
system development, firmware development, BIOS concepts, ACPI, SMBIOS tables,
RAS, Reliability, Availability, Serviceability, Power management, telemetry,
Memory subsystem validation, DDR, persistent memory, error injection,
Platform security features, TPM, SPDM, Secure Boot, RoT-based attestation,
Virtualization, firmware enablement, ACPI, SR-IOV, PCIe, CXL, Sideband protocols, MCTP, SPDM, PLDM, RDE
Description:
THE ROLE:
We are seeking a collaborative and highly motivated System Firmware Test Engineer to join our Firmware QA team. In this role, you will work closely with firmware architects and domain-specific validation teams to understand new firmware and system-level features, define end-to-end test strategies, develop and execute regression tests. You will play a key role in ensuring high-quality firmware releases through systematic, automated, and scalable validation frameworks. Additionally, you will help pioneer the integration of cutting-edge AI technologies into our QA ecosystem and deploy agentic AI systems and autonomous workflows to optimize test generation, execution, and defect analysis. The primary focus is client server-class EPYC CPUs, with opportunities to also work on Instinct GPUs.
THE PERSON:
You are a pragmatic, self-driven problem solver who enjoys digging into firmware and platform behavior, building repeatable tests, and collaborating to close bugs fast. You think in terms of reproducible results and automation, take pride in clear triage artifacts, and communicate effectively with architects, validation engineers, and firmware developers. You are forward-thinking and passionate about AI, with a practical understanding of how to apply autonomous agents and intelligent systems to eliminate traditional QA bottlenecks. We welcome applicants from diverse backgrounds who bring curiosity, technical depth, and a commitment to innovation.
KEY RESPONSIBILITIES:
Partner with firmware architects and validation teams to define platform level test strategies and coverage goals.
Define and implement platform-level, end-to-end test flows that validate firmware functionality across boot and runtime.
Design and implement automation friendly regression tests and test harnesses that integrate with CI.
Conduct test execution, debug issues (firmware, platform, infrastructure, automation), and collaborate with developers to drive timely defect resolution.
Contribute to test strategy and coverage analysis, with emphasis on system-level feature interactions and cross-domain dependencies.
Enhance test infrastructure to improve coverage, execution efficiency, and reporting/triage workflows.
Architect, build, and deploy agentic AI workflows and autonomous QA agents to automate complex tasks such as end-to-end test case generation, intelligent regression scoping, and predictive failure analysis.
Typical effort split: 60% firmware test execution & troubleshooting, 20% firmware test design & development, 20% AI infrastructure & agentic tool development.
PREFERRED EXPERIENCE:
Minimum 4 years of relevant experience in firmware/software development, validation, or test development.
Hands on experience with SoC or system level bring up and low level debugging.
Strong foundation in computer architecture and enterprise server platform features.
Practical experience writing test code and tools in C and/or C++, and scripting in Python, Perl, or Bash.
Demonstrated experience building or deploying AI applications, specifically autonomous agents, LLM-backed tools, or RAG architectures applied to engineering or testing pipelines.
Experience or knowledge in one or more of the following areas is highly desirable (with emphasis on system/firmware development or testability):
BIOS concepts (e.g., ACPI, SMBIOS tables)
RAS (Reliability, Availability, and Serviceability) features and validation
Memory subsystem validation (DDR, persistent memory, error injection, etc.)
Power management and telemetry
Platform security features (TPM, SPDM, Secure Boot, RoT-based attestation, etc.)
Virtualization and firmware enablement (ACPI, SR-IOV, etc.)
High-speed I/O validation (PCIe, CXL)
Sideband protocols (MCTP, SPDM, PLDM, RDE, etc.)
ACADEMIC CREDENTIALS:
Bachelor’s or master’s degree in related discipline preferred.
Notes:
Hybrid
VIVA USA is an equal opportunity employer and is committed to maintaining a professional working environment that is free from discrimination and unlawful harassment. The Management, contractors, and staff of VIVA USA shall respect others without regard to race, sex, religion, age, color, creed, national or ethnic origin, physical, mental or sensory disability, marital status, sexual orientation, or status as a Vietnam-era, recently separated veteran, Active war time or campaign badge veteran, Armed forces service medal veteran, or disabled veteran. Please contact us at for any complaints, comments and suggestions.
Contact Details :
Account co-ordinator: Godwin D Antony Raj
VIVA USA INC.
3601 Algonquin Road, Suite 425
Rolling Meadows, IL 60008
|
Never miss an opportunity! Create an alert based on the job you applied for.