Job Title: Principal Analog EDA Design Automation Engineer
Location: US-CA-Irvine
Overview:
Our client began by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t achieve the extremely high-performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we’ve developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we’ve expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end-to-end solutions in our target markets. One such example was the acquisition of Intel’s Home Gateway Platform Division that added Wi-Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers’ needs.
Responsibilities:
Our client is seeking a Principal Analog EDA Design Automation Engineer to join our team. In this role, you will focus on the following:
* Develop, maintain, and support the MaxLinear Analog/RF Project Environment, including EDA tools, PDK, and custom scripts
* Working with design and layout teams to optimize workflows, automating tasks with scripting, installing and managing EDA tools (Cadence, Mentor, Synopsys), and supporting IC design engineers by maintaining tools, licenses, and servers
* Lead innovation and enablement of custom analog/rf design methodology and solutions to address critical design challenges in cutting-edge technologies
* Drive AI adoption in analog IC design to enhance efficiency by automating labor-intensive tasks like circuit sizing, layout, and technology migration, reducing turnaround times from weeks to days
* Create documentation and provide hands-on training for design and layout engineers
* Work with EDA vendors to track and resolve issues
* Mentor and train new employees on MaxLinear Design Flows
* Understand overall IC design flow and experience in developing tools and methods for cycle time reduction
* Develop software for automation in Skill, Perl, Unix Shell scripting
Qualifications:
* Experience with Cadence Virtuoso Studio Environment, front-end and back-end tools such as Virtuoso, Spectre, Maestro, Layout Environment(s)
* Experience with Siemens Calibre Physical Verification Tools, Solido Simulation Environment
* Proficient in Linux Environment, Shell Scripting such as csh or bash
* Proficient in Programing languages such as Python or Perl
* Knowledge of version control tools such as perforce, design sync, Method IC
* Experience with Cadence SKILL Language
* Excellent interpersonal, communication, and presentation skills, along with strong multi-tasking skills, attention to detail, and the ability to work well in a team
* Highly disciplined approach to problem solving
* BS in Electrical Engineering or related + 9 years of experience, or MS + 7 years of experience, or Ph.D. + 4 years of experience
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