Hardware validation engineer

Role: System & Hardware Validation and DVT Engineers Location- San Jose, CA. JD: System & Hardware Validation and DVT Engineers to support the design, verification, and qualification of nextgeneration computing platforms, including datacenter systems and FPGAbased platforms. Key Responsibilities The System & Hardware Validation and DVT Engineer is responsible for ensuring the quality, reliability, and performance of AMD s hardware and systems through Design Verification Testing (DVT). This role

Role: Hardware Design Test Engineer Location: San Jose, CA - Onsite The Hardware Design Test Engineer supports production test development and product enablement activities across new product introduction and manufacturing. This role works closely with crossfunctional teams to help implement and maintain test solutions, analyze product performance, and support quality and reliability improvements. The position emphasizes handson learning, datadriven problem solving, and collaboration throughout

The Hardware Design Test Engineer supports production test development and product enablement activities across new product introduction and manufacturing. This role works closely with crossfunctional teams to help implement and maintain test solutions, analyze product performance, and support quality and reliability improvements. The position emphasizes handson learning, datadriven problem solving, and collaboration throughout the product lifecycle. Key Duties & Responsibilities Assist with the

Job Title - Sr. HW Design Test Engineer Location - Santa Clara, CA JD:Establish long-term test strategies covering NPI, sustaining, and manufacturing.Identify systemic quality risks early and drive mitigation plans before release.Hardware & System ExpertiseDeeply understand and review schematics, board layouts, and system architecture.Anticipate and debug complex issues involving:Power sequencing, reset topology, clocksHigh-speed interfaces (PCIe, Ethernet, SerDes)Memory subsystems (DDR, HBM, f