Analog Layout Engineer

Layout/Mask Engineer

Location - Dallas, Texas

Experience - 7 + 

Job Type: C2C

Work type: Onsite (5 days in a week)

Preferred Qualifications:

·        Experience in analog/custom layout design in advanced CMOS process(2+ years FinFet experience must)

·        Expertise in Cadence VLE/VXL,PVS, Assura and Calibre DRC/ LVS is a must.

·        Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Comparator, DDR blocks etc.,

·        Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)

·        Ability to understand design constraints and implement high-quality layouts.

·        Multiple Tape out support experience will be an added advantage.

Role and Responsibilities

·        Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.

·        Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation.

·        Responsible for on-time delivery of block-level/top-level layouts with acceptable quality.

·        Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.

·        Should have good experience in working with cross-functional team.

·        Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality.

·        Offer alternative solutions to clients (where appropriate) with the objective of retaining customers'' and clients'' business.

·        Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client.

·        Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project.