Custom ERC/Power-Intent Automation CAD Engineer

Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices!\\n\\nAs a member of our CAD team, you will architect, dictate, develop, maintain and enhance custom analog power intent methodology and circuit ERC solutions for our Analog, RF and mixed-signal designs. The role requires you to work with different technology nodes and provide flows/methodologies for the different tool sets.

In this highly visible role, your primary responsibilities will include:\n \tDeveloping innovative solutions on Circuit ERC (Electric Rules checks) or Power Intent analysis leveraging expertise on circuits and programming. \n \tIdentify opportunities for optimization, expediting, and enhancing the flow to improve the end-user experience in terms of precise error reporting, false error reduction and automate via ML/AI solutions.\n \tActively involving yourself in supporting ERC/Power Intent on voltage domain interactions like - supply gating mechanisms, isolation controls, level shifting, switch supplies, virtual domain interactions, power integrity etc. \n \tClosely collaborating with diverse design teams, including Custom Analog, Mixed-Signal, Digital, RF and more, to understand their needs and requirements on circuit ERC and power flows. Applying advanced techniques to address these requirements across multiple products and reduce duplicate design work. \n \tWorking in tandem with other domain in CAD, Power, Technology teams to validate their ML-based applications, implement enhancements, and evaluate external vendor packages and solutions from EDA (Electronic Design Automation) providers and open-source.

Experience in Electric Rules Checks (ERC) tools, circuit tracing and/or experience on custom power intent tools, flows and methodology.\nAnalog/RFIC design background and/or related CAD/automation support areas involving various technology nodes and tape out.\nProgramming/scripting skills in Perl, Python, TCL, SKILL language, C++ or Shell. \nMinimum requirement of BS degree and 10+ years of relevant industry experience

Experience leading industry electrical engineering-focused software development project. \nAbility to provide automations for rapid and dynamic design needs.\nExperience in understanding on the operating principles of common Analog, Digital/SRAM blocks, Spice Modeling in Nano CMOS technologies. \nExperience with custom Schematic/Layout tracing via SPICE/Open Access, power gating techniques, biasing, circuit topologies (power switches, level-shifter, iso), virtual/derived/multi-power domains, standard-cells would be helpful.\nHands on experience with SVRF, TCL, Liberty/.lib, UPF - IEEE1801, CPF formats with exposure on power intent domain and methodology is a plus.\nExposure to industry low power tools, Siemens Calibre PERC; Cadence Conformal LEC, Virtuoso Power Manager, Innovus; Synopsys Library compiler, VCLP, Low Power verification is desirable.\nKnowledge of Cadence Virtuoso Framework with experience on front end Schematic composer will helpful. \nBackground in SPICE simulation, SOA, device operating conditions, and knowledge of Post-layout extraction is a plus.\nAbility to drive a software development team to develop novel and complex applications.\nGood written and verbal communication skills, and the ability to collaborate well with cross-functional teams.