Associate FPGA / ASIC Design Engineer

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Department Summary:

MITRE's Electronic Systems Development department is seeking to hire talented engineers starting Summer of 2026 with a background in Field-Programmable Gate Array (FPGA) and/or Application-Specific Integrated Circuit (ASIC) design to support advanced research and development projects of national significance. Qualified candidates will join a multi-disciplinary team to help support the design and implementation of proof-of-concept prototype systems on embedded hardware platforms. Our diverse set of sponsors and research objectives provide a wide variety of interesting work opportunities such as:

• Real-time communication and sensor systems leveraging cutting-edge ASIC design, FPGA technology, and Software-Defined Radio (SDR) platforms
• Advanced architectures for high throughput signal processing algorithms
• Tightly integrated, custom platforms targeting low size, weight, power and cost (SWaP-C) applications
• Cross-disciplinary teams of similarly bright and motivated engineers on projects of national importance

Roles & Responsibilities:

Our team specializes in rapid prototyping of advanced sensor, communication, and navigation systems on state-of-the-art embedded system platforms. This position provides an exciting opportunity to work on the following:

• Component development across FPGA and ASIC technologies
• Implementation of algorithms in SW/HW on embedded systems
• Development, integration, and testing of custom prototypes in the lab

Basic Qualifications:

We are interested in highly motivated candidates with a wide variety of skills, insatiable curiosity, enthusiasm, and the ability and interest to dig deep on challenging technical problems. Minimum qualifications include:

• Typically requires less than 1 year of related experience with a related Bachelor's degree, or equivalent combination of related education and work experience.
• A Bachelor's degree in Electrical and/or Computer Engineering (or similar field), or an equivalent combination of related education and work experience.
• Solid understanding of digital system design at the Boolean logic level
• Solid understanding of basic circuits and electronic principles
• Experience with programming and a working knowledge of one or more Hardware Description Languages (HDLs) such as VHDL, Verilog, or System Verilog
• Exposure to FPGA or ASIC simulation, synthesis, and implementation tools
• Exposure to programming languages such as C/C++ and Python
• Strong oral and written communication skills
• Applicants selected for this position will be subject to a US government security investigation and must be able to obtain and maintain a Department of Defense SECRET clearance, which requires ship
• Candidates must meet requirements to support project work on-site in our labs and classified facilities on the Bedford, MA Campus
• This position requires a minimum of 4 days a week on-site at our Bedford, MA facility.

Preferred Qualifications:

• Master's degree in Electrical and/or Computer Engineering or similar field
• Active Secret Clearance
• Exposure to cutting-edge, reconfigurable SoC platforms (e.g., AMD Xilinx MPSoC, AMD Xilinx RFSoC, AMD Xilinx Versal, Intel Agilex SoC)
• Familiarity with all phases of digital design, including architecture, implementation, verification, test, documentation, and version control
• Exposure to leading edge process nodes and foundries including GlobalFoundries, Intel, and TSMC
• Solid understanding of processor interface techniques such as memory mapped peripherals and interrupts
• Familiarity with scripting languages and build tools (TCL, Python, CMake)
• Experience deploying designs on FPGA or SDR platforms, from RTL, through simulation, synthesis, lab bring-up and debug
• Fundamental understanding of microelectronic circuits and transistors
• Experience in ASIC or FPGA EDA tools including synthesis, timing closure, place & route, and emulation techniques
• Basic understanding of signal processing concepts and exposure to MATLAB
• Familiarity with Artificial Intelligence (AI) and machine learning concepts

This requisition requires the candidate to have a minimum of the following clearance(s):
None

This requisition requires the hired candidate to have or obtain, within one year from the date of hire, the following clearance(s):
Secret

Salary compensation range and midpoint:
$89,200 - $111,500 - $133,800 Annual

Work Location Type:
Onsite

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Commitment to Non-Discrimination

All qualified applicants will receive consideration for employment without regard to disability, status as a protected veteran or any other status protected by applicable federal, state, local or international law.

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