PCB Layout Engineer KiCad 4-Layer Mixed-Signal IPC Class 3

Technical Specifications — Board

• 4-layer, 100 × 80 mm, FR-4, ENIG surface finish
• Mixed-signal: ARM Cortex-M7 MCU + precision 3-phase analog AFE + Ethernet PHY
• ~45 unique components, ~120 placements — SMD and through-hole
• Fine-pitch packages: 0402, QFN/LFCSP (0.5 mm pitch), LQFP-100
• 50Ω controlled impedance: Ethernet RMII bus
• IEC 61010-1 safety creepage and clearance on high-voltage measurement inputs
• IPC-A-610 Class 3 design rules required

Required Technical Skills

• KiCad v8 or v9 — full schematic-to-Gerber workflow
• 4-layer mixed-signal PCB design — analog, digital, and power planes
• Controlled impedance routing — Ethernet and high-speed digital
• Fine-pitch IC layout — QFN, LFCSP, LQFP at 0.5 mm pitch
• Ground plane management — analog/digital split, via stitching
• IPC-A-610 Class 3 design rules
• IEC 61010-1 or equivalent safety standard — creepage/clearance
• Thermal management — exposed pad via design

Preferred / Nice to Have

• Energy metering or power measurement IC layout experience
• Harsh environment / maritime PCB design (conformal coating awareness)
• ARM MCU + Ethernet PHY layout experience
• DFM review with contract manufacturer feedback

Deliverables

• PCB layout: component placement and full routing to production-ready standard
• Analog/digital ground plane split for precision 3-phase metering IC
• Separate analog and digital power domains
• 50Ω controlled impedance routing for Ethernet RMII bus (with impedance report)
• Thermal via arrays under exposed-pad ICs (QFN, LFCSP packages)
• Safety creepage/clearance enforcement on high-voltage measurement inputs per IEC 61010-1
• Via stitching for ground plane integrity throughout
• BOM cross-check against schematic; footprint verification for all fine-pitch ICs
• DRC — zero violations at delivery
• Complete Gerber package (all copper, mask, silk, paste, outline layers)
• Excellon drill files with report
• Pick-and-Place CSV
• Assembly and fabrication drawings (PDF)

GRT Provides

• Complete schematic in KiCad (ready to use)
• BOM with manufacturer part numbers and approved alternates
• Design rules file, stackup definition, and net class assignments
• Fabrication and assembly specification documents

Engagement Details

• Contract Type: Fixed-price — provide your estimate on application
• Timeline: ~1 week delivery; 1–2 review iterations included in scope
• Start: Immediate — source files available on Day 1
• Communication: English — async-friendly with scheduled review checkpoints
• NDA required prior to source file transfer

Keywords / Skills

KiCad · PCB Layout · Mixed-Signal · 4-Layer PCB · Controlled Impedance · QFN Layout · LQFP · Ethernet RMII · ARM Cortex-M7 · Analog Front-End · IPC-A-610 Class 3 · IEC 61010-1 · Ground Plane · Via Stitching · ENIG · Gerber · Excellon · DFM · Industrial IoT · Maritime Electronics · Precision Metering

To Apply on Dice

• Submit resume with emphasis on hardware/PCB design experience
• Include portfolio samples: 4-layer mixed-signal boards with fine-pitch ICs
• State your KiCad version and describe your impedance control process
• Provide a fixed-price quote with your application