Sr. Analog Design Engineer

Role: Sr. Analog Design Engineer

Location: Santa Clara, CA (Fully onsite)

Duration: 12+ Months

Must have:

• Analog circuit design experience in DACs, ADCs, current drivers, linear regulators, and other various supporting circuitry in CMOS processes.
• Proficiency in the use of Python to generate test code for silicon verification & characterization.
• Good understanding of IC device physics, spice models, ESD, latch-up, and manufacturing technology are also required.
• Proficient in the use of Cadence's IC design environment (Virtuoso Schematic/Layout), analog circuit simulation (Spectre/ADE), and digital RTL design (SystemVerilog).

Role Overview:

We are seeking a hands-on Senior Analog Design Engineer with a strong background in analog and mixed-signal CMOS design to support the development of innovative integrated circuits for advanced semiconductor fabrication tools. This role is ideal for an engineer who enjoys deep technical challenges, questioning conventional approaches, and pushing the boundaries of technology in a collaborative, close-knit team environment.

You will contribute to the design and verification of a wide range of analog and mixed-signal circuits, while working closely with internal stakeholders from concept through silicon characterization.

Responsibilities:

• Design and develop analog and mixed-signal CMOS circuits, including:
• Bandgap voltage references
• Low-noise amplifiers (LNAs)
• Comparators, mixers
• Data converters (ADC/DAC)
• Active filters, oscillators, and supporting circuitry
• Negotiate design specifications with internal customers and cross-functional stakeholders.
• Translate IC fabrication process capabilities into robust, real-world circuit designs.
• Design, simulate, and verify analog and digital CMOS circuits.
• Review and supervise custom layout of analog circuits at both block and full-chip levels.
• Design experiments, test boards, and test programs for silicon characterization.
• Support bench testing, evaluation, and troubleshooting during silicon bring-up.
• Plan and schedule design tasks to ensure timely delivery of designs meeting all specifications.

Education & Experience

• M.S. in Electrical Engineering (or equivalent).
• 5+ years of industry experience designing mixed-signal ASICs.

Requirements:

• Strong hands-on experience in analog circuit design including:
• DACs, ADCs
• Current drivers
• Linear regulators
• Supporting analog circuitry in CMOS processes
• (High-voltage design experience is a plus)
• Solid understanding of:
• IC device physics
• SPICE models
• ESD and latch-up
• Semiconductor manufacturing technology
• Proficiency with Cadence IC design tools, including:
• Virtuoso (Schematic & Layout)
• Spectre / ADE for analog simulation
• Experience with digital RTL design using SystemVerilog.