Wireless Radio Verification Engineer

San Diego, CA, US • Posted 10 hours ago • Updated 10 hours ago
Full Time
On-site
Fitment

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Job Details

Skills

  • Art
  • Wireless Communication
  • Power Management
  • Bridging
  • Test Plans
  • Radio
  • ASIC
  • SystemVerilog
  • RTL
  • Debugging
  • Digital Design
  • Verilog
  • VHDL
  • Problem Solving
  • Conflict Resolution
  • Random Testing
  • UVM
  • Mixed-signal Integrated Circuit
  • Modeling
  • RF
  • Systems Design
  • Python
  • Perl
  • Bash
  • Scripting
  • Communication

Summary

Join Apple's Wireless Connectivity team developing state-of-the-art WiFi SoCs that power hundreds of millions of Apple products worldwide. You'll be part of our vertically integrated organization shaping next-gen wireless technology from concept through production. As a Wireless Radio Verification Engineer, you'll ensure first-time-right silicon success through sophisticated testbenches, comprehensive scenarios, and cutting-edge verification methodologies-enabling multi-gigabit wireless technology connecting the world!

As a Wireless Radio Verification Engineer, you'll verify Radio digital controllers combined with RF subsystems that enable exceptional wireless performance. You'll develop verification environments for complex radio control / transceiver paths spanning PLLs, DAC / ADC data paths, power management, and co-existence mechanisms. This role emphasizes digital verification while bridging to RF/analog domains-you'll work closely with Design, RF, PHY, and Systems teams to understand radio specifications and develop comprehensive test strategies. You'll own subsystem verification from test planning through coverage closure, building testbench components and scenarios that exercise complex radio control sequences and operating modes.

Minimum requirement of a bachelor's degree.\nUnderstanding of ASIC verification flows with SystemVerilog including UVM testbench development, scenario creation, and RTL simulation.\nExperience developing verification environments, bringing up designs in simulation, and debugging functional issues.\nExperience with digital design fundamentals Verilog or VHDL.\nExperience with scripting languages such as Python, or similar.\nStrong problem-solving abilities and collaborative approach to engineering challenges.

Experience with digital controllers, subsystems, or data paths. \nExperience with constrained random testing, functional coverage implementation, UVM methodology, and assertion-based verification.\nExposure to mixed-signal modeling concepts including real-number modeling.\nExposure to RF/analog system design such as LNAs, Mixers, PLLs, amplifiers, LDOs, DAC / ADCs.\nProficiency with Python, Perl, Bash or similar scripting for automation.\nGreat teammate with excellent communication skills and desire to seek diverse technical challenges.
Employers have access to artificial intelligence language tools (“AI”) that help generate and enhance job descriptions and AI may have been used to create this description. The position description has been reviewed for accuracy and Dice believes it to correctly reflect the job opportunity.
  • Dice Id: 90733111
  • Position Id: 12f17a1d2bc207e63c6ea65e74191932
  • Posted 10 hours ago
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