HSIO Validation Engineer

Role - HSIO Validation Engineer 
Location - Mountainview CA 
Key skills: HSIP, MIPI M-PHY, USB 3.2, Linux, Python, Shell, BERTs, JTAG, Oscilloscope, T32, VNA, PCB schematics, PyVISA, Pytest, Pandas, Pywinauto, PyAutoGUI

• Own bench level design validation and electrical compliance for High-speed serial interfaces (MIPI M-PHY, USB3.2), ensuring certification rediness across PVT operating conditions.

• Characterize signal and power integrity using oscilloscopes, BERTs and VNA to perform advanced analysis including eye diagrams, Jitter decomposition, and receiver (RX) tolerance

• Collaborate with cross functional teams to root-cause complex PHY-level electrical issues and protocol link-up failures, driving design corrective actions

• Design python-based automation to improve lab efficiency and partner with architecture teams to implement end-to-end manufacturing test solutions.

• Influence next generation product design via developing ATE/SLT screens to reduce defective part per million(DPMT)

10+ Years of experience

• 3 years of experience in high-speed I/O validation, Specifically focussing on MIPI M-PHY or USB3.2 electrical compliance & characterization

• Experience in Linux, Python & Shell scripting 

• Experience with lab equipment including high-bandwidth oscilloscopes, BERTs, JTAG, T32 and Vector Network analysers(VNA)

• Experience in IP bringup, validation, PCB schematics/Layout and manufacturing support

• Experience debugging hardware issues using schematics and layouts

• Experience with MPHY and USB-IF compliance testing and the official certification process

• Experience with advanced equalization techniques and their characterization

• Experience with python based automation(electrical measurement equipment, environmental chambers, etc) and scripting (data analysis, manipulation, visualizations)

• Experience with one or more of the following: PyVISA, Pytest, Pandas, Pywinauto, PyAutoGUI

• Experience with signal integrity principles and measurement techniques.